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  4. Challenges in Realizing Silver Sintered Flip-Chip Interconnects for High Temperature Sensor Systems
 
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2023
Conference Paper
Title

Challenges in Realizing Silver Sintered Flip-Chip Interconnects for High Temperature Sensor Systems

Abstract
A novel silver sintering process was developed whereby up to three finely structured flip-chips (200 µm pad diameter at 400 µm pitch) were joined to a LTCC circuit board with rather coarse conductor lines made of AgPt thick film metalliza-tion. Additionally, a new and effective underfill process was developed using prepreg material. Submitting functional samples required overcoming several difficulties such as topographic mismatch, surface contamination, multi-die assem-bly, and fine-tuning the two primary processes (sintering and underfilling) to run simultaneously. Electrical functionality was demonstrated even up to 1000 cycles in temperature cycling tests (-55 °C to 150 °C). Temperature storage tests at 250 °C and 300 °C were performed, and electrically measurable degradation of the flip-chip interconnects occurred some-where between 25 h and 50 h of thermal aging.
Author(s)
Rämer, Olaf  
Technical University of Berlin
Spanier, Malte  
Technical University of Berlin
Schneider-Ramelow, Martin  
Technical University of Berlin
Weber, Constanze  
Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM  
Hutter, Matthias  
Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM  
Ostmann, Andreas  
Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM  
Mainwork
MikroSystemTechnik Kongress 2023  
Conference
MikroSystemTechnik Kongress 2023  
Language
English
Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM  
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