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  4. A 50 V smart power process with dielectric isolation by SIMOX
 
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1992
Conference Paper
Title

A 50 V smart power process with dielectric isolation by SIMOX

Abstract
A new process has been developed which provides dielectrically isolated power and low voltage devices by means of rather standard VLSI CMOS technology. Isolation is obtained by SIMOX and trenches. For smart power applications this process allows the manufacturing of 50 V vertical DMOS transistors (VDMOS) together with 50 V dielectrically isolated quasivertical DMOS transistors (QVDMOS). For control circuit design CMOS, high voltage PMOS transistors (HVPMOS), NPN transistors, JFETs, Zener and Schottky diodes are available on the same chip. Thus, the designer has at hand a wide range of devices which allows an optimun solution for many circuit applications.
Author(s)
Vogt, H.
Weyers, J.
Mainwork
International Electron Devices Meeting '92. Technical Digest  
Conference
International Electron Devices Meeting 1992  
Language
English
Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS  
Keyword(s)
  • CMOS process

  • CMOS-Technik

  • dielectric isolation

  • DMOS transistor

  • driver circuits

  • npn transistor

  • Schottky-Diode

  • SIMOX

  • Smart-power-Technik

  • smart power technology

  • Sperrschicht-FET

  • Treiberstufe

  • trenches

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