• English
  • Deutsch
  • Log In
    Password Login
    Research Outputs
    Fundings & Projects
    Researchers
    Institutes
    Statistics
Repository logo
Fraunhofer-Gesellschaft
  1. Home
  2. Fraunhofer-Gesellschaft
  3. Konferenzschrift
  4. Wafer Bumping for Wafer-Level CSPs and Flip Chips using Stencil Printing Technology
 
  • Details
  • Full
Options
1999
Conference Paper
Title

Wafer Bumping for Wafer-Level CSPs and Flip Chips using Stencil Printing Technology

Abstract
In this paper the experimental work of stencil printing for creating solder bumps on wafer-level CSP (CSP-WL) is described in detail. In the first part the basic process steps for wafer-level CSP's as well as for stencil printing are described. The second part shows the experimental work how maximum solder bump height can be achieved using stencil printing for a specific wafer-level CSP. Based on the experimental work the achieved bump height using conventional bumping methods and stencil printing are discussed.
Author(s)
Töpper, M.
Coskina, P.
Krause, F.
Halser, K.
Ehrmann, O.
Scheel, W.
Reichl, H.
Mainwork
12th European Microelectronics & Packaging Conference. Proceedings  
Conference
European Microelectronics & Packaging Conference 1999  
Language
English
Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM  
  • Cookie settings
  • Imprint
  • Privacy policy
  • Api
  • Contact
© 2024