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  4. Challenges and Solutions for Interoperability in BoW-based Multi-Chip Module Systems
 
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2026
Conference Paper
Title

Challenges and Solutions for Interoperability in BoW-based Multi-Chip Module Systems

Abstract
The Bunch of Wires (BoW) standard has emerged as a scalable and open solution for chiplet-to-chiplet communication, enabling the integration of dies fabricated in heterogeneous technology nodes. Despite its robust physical interface, BoW adoption in multi-chip modules (MCM) faces challenges related to performance degradation, standard compliance, and mismatched operating voltage domains, which can compromise interface reliability and efficiency. This work investigates these challenges with a primary focus on voltage-domain mismatch in BoW-based Die-to-Die (D2D) interfaces. A comparative analysis of transmitter implementations in 130 nm and 22 nm technologies is performed to study process-dependent behavior. Based on this analysis, a configurable low-swing transmitter architecture is implemented in 130 nm to enable PHY-level voltage adaptation. Simulation results demonstrate that controlled swing reduction enables safe cross-node interfacing while improving energy efficiency. These findings highlight the importance of voltage-domain management for reliable heterogeneous BoW integration and support its broader adoption in chiplet-based systems.
Author(s)
Kadam, Sneha
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Navilipuri, Lavakumar
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Tumuluru, Karthik
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Heinig, Andy  
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Mainwork
4th International Conference on Integrated Circuits and Communication Systems, ICICACS 2026  
Conference
International Conference on Integrated Circuits and Communication Systems 2026  
DOI
10.1109/ICICACS68679.2026.11578554
Language
English
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Keyword(s)
  • Bunch of Wires

  • die-to-die

  • downscaling technique

  • heterogeneous systems

  • interoperability

  • multi-chip modules

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