Influence of photoresist pattern on charging damage during high current ion implantation

The influence of photoresist pattern on charging damage of gate oxides during high current arsenic implantation is studied. Metal-oxide- semiconductor (MOS) capacitors of 10 mu m/sup 2/ active area and 4.5 nm oxide thickness connected with various types of poly antennas and resist patterns on top were processed, whereby the resist overlapped and/or enclosed the gate electrode during ion implantation. The evaluation of the devices was performed by leakage current and charge to breakdown (Qbd) measurements. The influence of resist size, perimeter, and coverage of polyelectrodes is described in detail.