HF-release of sacrificial layers in CMOS-integrated MOEMS structures

In this paper we will present details of the release process of SiO2 sacrificial layers we use within a multi-level MOEMS process developed by IPMS. Using such sacrificial layers gain a lot of benefits necessary for the production of high-end MOEMS devices like high surface quality and great surface planarity. However the HF-release of the sacrificial layer can be connected with specific issues. We present, which mechanisms are involved in the release process and how knowing them, can be the key for an optimized performance of the device. More-over we will present how to protect the CMOS backplane of our devices from unwanted HF attack during the release.