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  4. Novel back-end-of-line compatible method for integration of inductances with magnetic core on silicon
 
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2020
Conference Paper
Title

Novel back-end-of-line compatible method for integration of inductances with magnetic core on silicon

Abstract
In high frequency applications like power supplies, the integration of active and passive components on a single chip is necessary to increase the power density. A novel approach for the integration of micro-inductances with a magnetic core on silicon substrates is presented. This paper shows development, processing and investigation of different samples, having a magnetic core of 3.4 mm x 1 mm x 0.6 mm in size. At 20 MHz inductances of 150 nH are reached, whereas the resistance is about 0.66 ?. The fabrication technique is based on the agglomeration of micron-sized magnetic powder by atomic layer deposition (ALD). The process is fully back-end-of-line (BEOL) compatible and offers a wide range of magnetic materials, which can be integrated on the substrate in any desired geometry of the core. This enables a lot of possibilities for the integration and design of inductors.
Author(s)
Paesler, M.
Lisec, T.
Kapels, H.
Mainwork
CIPS 2020, 11th International Conference on Integrated Power Electronics Systems. Proceedings  
Conference
International Conference on Integrated Power Electronics Systems (CIPS) 2020  
Language
English
Fraunhofer-Institut für Siliziumtechnologie ISIT  
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