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  4. SiC MOSFET with a self-aligned channel defined by shallow source-JFET implantation: A simulation study
 
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2019
Poster
Titel

SiC MOSFET with a self-aligned channel defined by shallow source-JFET implantation: A simulation study

Titel Supplements
Poster presented at International Conference on Silicon Carbide & Related Materials, September 29th - October 04th, 2019, Kyoto, Japan
Abstract
Large cell density within power device is needed to obtain low on state resistance. Cell integration is limited by resolution and overlay accuracy of photolithography. Self-aligned processes, e.g. the self-aligned channel for SiC MOSFET using an over-oxidized polysilicon implantation mask, help to downsale the cell pitch and to increase the cell integration in the device.
Author(s)
Sledziewski, Tomasz
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB
Erlbacher, Tobias
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB
Konferenz
International Conference on Silicon Carbide and Related Materials (ICSCRM) 2019
DOI
10.24406/publica-fhg-405653
File(s)
N-565410.pdf (1.24 MB)
Language
English
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