FPGA-based phase measuring profilometry system

This paper proposes an architecture for a phase measuring profilometry system, that can be efficiently implemented on a Xilinx Zynq-7000 SoC. After a brief system overview, the paper starts at the very beginning point of such a task, that is the camera calibration. A calibration procedure using OpenCV functions is outlined and the calculation of compressed rectification maps is described in more detail. The compressed rectification maps are used for lens undistortion and rectification to reduce the memory load. The hardware accelerated part of the system comprises the image acquisition, the lens undistortion and image rectification, the phase accumulation with following phase unwrapping, the phase matching and the 3D reconstruction. For phase unwrapping a multi-frequency approach is used that can be easily implemented on the given architecture. The interfacing of the hardware modules follows a fully pipelined implementation scheme so that the image processing can be done in real time.