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  4. 3D integration approaches for MEMS and CMOS sensors based on a Cu through-silicon-via technology and wafer level bonding
 
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2015
Conference Paper
Title

3D integration approaches for MEMS and CMOS sensors based on a Cu through-silicon-via technology and wafer level bonding

Abstract
Technologies for the 3D integration are described within this paper with respect to devices that have to retain a specific minimum wafer thickness for handling purposes (CMOS) and integrity of mechanical elements (MEMS). This implies Through-Silicon Vias (TSVs) with large dimensions and high aspect ratios (HAR). Moreover, as a main objective, the aspired TSV technology had to be universal and scalable with the designated utilization in a MEMS/CMOS foundry. Two TSV approaches are investigated and discussed, in which the TSVs were fabricated either before or after wafer thinning. One distinctive feature is an incomplete TSV Cu-filling, which avoids long processing and complex process control, while minimizing the thermomechanical stress between Cu and Si and related adverse effects in the device. However, the incomplete filling also includes various challenges regarding process integration. A method based on pattern plating is described, in which TSVs are metalized at the same time as the redistribution layer and which eliminates the need for additional planarization and patterning steps. For MEMS, the realization of a protective hermetically sealed capping is crucial, which is addressed in this paper by glass frit wafer level bonding and is discussed for hermetic sealing of MEMS inertial sensors. The TSV based 3D integration technologies are demonstrated on CMOS like test vehicle and on a MEMS device fabricated in Air Gap Insulated Microstructure (AIM) technology.
Author(s)
Hofmann, Lutz
Dempwolf, S.
Reuter, Danny  
Ecke, Ramona
Gottfried, Knut  
Schulz, Stefan E.  
Knechtel, R.
Geßner, Thomas  
Mainwork
Smart Sensors, Actuators, and MEMS VII; and Cyber Physical Systems  
Conference
Conference "Smart Sensors, Actuators, and MEMS" 2015  
Conference "Cyber Physical Systems" 2015  
DOI
10.1117/12.2178598
Language
English
Fraunhofer-Institut für Elektronische Nanosysteme ENAS  
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