Quick estimation of resources of FPGAs and ASICs using neural networks

The redFIR2 project at the Fraunhofer Institute for Integrated Circuits is a tool that provides optimised Finite Impulse Response structures. The generation process of these structures is based on a component library containing seven scalable basismodules. Depending on the chosen Integrated Circuit technology and on the I/O wordlengths the resource utilisation of the modules differ considerably. A fast, a priori estimation of resources during the system-level design is of crucial importance for the generation of resource optimised (adjusted to an Integrated Circuit technology) Intellectual Property cores. The objective of this work is to develop a flexible, adaptive resource estimation methodology.