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  4. Analog circuit design in PD-SOI CMOS technology for high temperatures up to 400 °C using reverse body biasing (RBB)
 
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2014
Doctoral Thesis
Title

Analog circuit design in PD-SOI CMOS technology for high temperatures up to 400 °C using reverse body biasing (RBB)

Thesis Note
Zugl.: Duisburg-Essen, Univ., Diss., 2014
Author(s)
Schmidt, Alexander  
Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS  
Advisor(s)
Kokozinski, Rainer  
Fiedler, Horst-Lothar
Publisher
Shaker  
Publishing Place
Aachen
Link
Link
Language
English
Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS  
Keyword(s)
  • CMOS

  • Hochtemperatur

  • Silicon-on-Insulator (SOI)

  • high temperature

  • PD-SOI

  • leakage current

  • RBB

  • reverse body biasing

  • FD-SOI

  • partially depleted

  • Leckströme

  • teilweise verarmter Film

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