Influence of dry etch conditions on the performance of recessed gate GaN/AlGaN HEMTs

Dry etch processes based on Cl 2/SF 6 have been developed to selectively remove GaN over AlGaN to fabricate recessed gate GaN/AIGaN High Electron Mobility Transistors (HEMTs). Since dry etch processes may damage the HEMT structure the influence of etch conditions on the transistor performance has been investigated using DC, RF and power measurements. Recess etch conditions resulting in bias potentials of only -64 V yield a shift in threshold voltage of 1.6 V as compared to transistors for which a low bias etch process (-24 V) was used.