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  4. Investigation of the spatial distribution of current density and heat dissipation in high-power-semiconductor devices
 
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2002
Conference Paper
Title

Investigation of the spatial distribution of current density and heat dissipation in high-power-semiconductor devices

Abstract
Due to their very small on-resistance the performance of modern power semiconductor devices strongly depends on details of the packaging method. In order to achieve an optimum of RDS,on, current handling capability, long time reliability and cost it is necessary to realize a homogeneous current density distribution and therefore homogeneous power dissipation over the device with a minimum number of contacts. The accurate calculation of the influence of packaging on device performance can significantly improve and simplify the development of high power devices and systems. We show that with the aid of a simulation model based on SPICE together with ANSYS simulations it is possible to calculate the spatial variations of current density, electrical potential and temperature of large area power MOSFETs. In order to verify the simulation model, spatially resolved potential measurements were carried out and compared with the simulation results. The number of contacts to the device was varied and the influence on the local current density, the RDS,on and the temperature profile were studied.
Author(s)
Sauerland, F.
Paschen, U.
Vogt, H.
Mainwork
Area array packaging technologies 2002  
Conference
International Workshop on Area Array Packaging Technologies 2002  
Workshop on Flip Chip, CSP, Wafer Level Packaging 2002  
Language
English
Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS  
Keyword(s)
  • packaging

  • Aufbauverbindungstechnik

  • SPICE

  • Verbindungstechnik

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