Hierarchical Compression of Geometry and Bounding Volume Hierarchies using Dynamic Bit Wise Encoding for Memory Efficient Ray Tracing on the GPU

In this thesis we will present an implementation of a parallelized ray tracer using CUDA, which works with a hierarchically compressed BVH and compressed geometry. With the freedom of choice over the amount of bits that can be used for the compression, we present a variable construction of the BVH and a desirable trade off between memory and computation efficiency. Since CUDA works best with a structured memory layout, every compressed BVH node and primitive will be stored in native word size. This not only reduces the overall amount of memory but also the amount of memory loads at runtime inside the CUDA kernel.