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  4. Implementing virtual metrology into semiconductor production processes - an investment assessment
 
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2011
Conference Paper
Title

Implementing virtual metrology into semiconductor production processes - an investment assessment

Abstract
Continuously increasing complexity of semiconductor manufacturing processes drives the need for wafer to wafer and even within wafer control loops metrology. Applying Virtual Metrology (VM) techniques is one promising approach to reduce the time between process, measurement and corrective actions. Prior to implementation besides technical aspects like testing the investment into VM has to be assessed and justified on the basis of reliable and reasonable data. This paper presents the investment assessment for implementing VM algorithms into plasma etcher tools of a model semiconductor fabrication line. Core of the investment calculation is a spreadsheet-based calculation which allows for a results per quarter evaluation. A Discrete Event Simulation (DES) model was developed to produce r elevant input data for the spreadsheet calculation. Potential risks e.g., delivery of wrong VM results due to the implementation of VM have been identified and evaluated using the standardized method of Failure Mode and Effects Analysis (FMEA).
Author(s)
Koitzsch, Matthias
Merhof, Jochen
Michl, Markus
Noll, Humbert
Nemecek, Alexander
Honold, Alfred
Kleineidam, Gerhard
Lebrecht, Holger
Mainwork
Winter Simulation Conference, WSC 2011. Proceedings  
Conference
Winter Simulation Conference (WSC) 2011  
Open Access
File(s)
Download (578.44 KB)
Rights
Use according to copyright law
DOI
10.1109/WSC.2011.6147915
10.24406/publica-r-373834
Language
English
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
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