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  4. A very high slew-rate dynamic CMOS operational amplifier
 
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1988
Conference Paper
Title

A very high slew-rate dynamic CMOS operational amplifier

Abstract
We present a dynamic CMOS operational amplifier with a special input circuit which injects an extra bias current to increase the slew-rate, depending on the input signal. The performance of this operational amplifier is compared to a conventional operational amplifier when used in a sample&hold circuit. The maximum operating clock frequency of the sample&hold circuit increases from 290 kHz up to 1 MHz with a hold-capacitor of 1 nF. The amplifier has been fabricated in a 5 µm CMOS process and dissipates a static power of 7.5 mW.
Author(s)
Klinke, Roland
Hosticka, Bedrich
Pfleiderer, Hans-Jörg
Mainwork
ESSCIRC '88. 14th European Solid State Circuits Conference. Proceedings  
Conference
European Solid State Circuits Conference 1988  
Language
English
Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS  
Keyword(s)
  • Operationsverstärker

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