3D Integration: Status, Challenges and Requirements

Heterogeneous integration of different devices by using 3D architectures allows the realization of applications especially optimized for SiP in a high efficient and cost effective way. Basic elements for 3D integration are Through Silicon Vias (TSVs) or other vertical interconnect tructures e.g. TMVs. Interposer architectures are very attractive to deal with system performance improve-ment and to achieve cost effective packaging solutions.