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  4. 3d Wafer Level Packaging By Using Cu-Through Silicon Vias For Thin Mems Accelerometer Packages
 
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2015
Conference Paper
Title

3d Wafer Level Packaging By Using Cu-Through Silicon Vias For Thin Mems Accelerometer Packages

Author(s)
Hofmann, Lutz
Reuter, Danny  
Schubert, I.
Wünsch, Dirk  
Rennau, Michael
Ecke, Ramona
Vogel, Klaus  
Gottfried, Knut  
Schulz, Stefan E.  
Geßner, Thomas  
Mainwork
12th Annual International Wafer-Level Packaging Conference, IWLPC 2015  
Conference
International Wafer-Level Packaging Conference (IWLPC) 2015  
Language
English
Fraunhofer-Institut für Elektronische Nanosysteme ENAS  
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