Empirical Modelling of Tunneling Processes in 4H-SiC Gated Pin-Diodes

With lateral 4H-SiC gated pin-diodes, the tunneling behavior at the interface of a highly p-type doped anode and a gate-induced n-channel within the i-region can be controlled via the reverse voltage and the gate voltage. In this paper, the output characteristic is modelled empirically based on measurements of fabricated devices. The model used in this work is based on Zener-tunneling through a triangular barrier and the maximum electric field in a pnjunction assuming the depletion approximation. The influence on the tunneling current of varying reverse voltages is weaker than predicted by the employed theory, but an empirically updated model, where the expression for the electric field is altered, can fit the characteristic well.