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2017
Presentation
Title

Analog IP - with intelligent IP from system to silicon

Title Supplement
Presentation held at COSEDA User Group Meeting 2017, Munich
Abstract
The design of integrated analog circuits is still an almost entirely manual task and therefore expensive, time-consuming, and risky. Intelligent IP (IIP) technology provides unique Analog/Mixed-Signal soft IPs with a high level of analog design automation. IIPs are mainly featured by automated correct-by-construction design generation, technology independence, and configurability. Furthermore, standardized IIP leads to improved design safety. Intelligent IP provides the possibility to automate the design process from transistor-level implementation to system-level behavioral model.
Author(s)
Reich, Torsten  
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Conference
COSEDA User Group Meeting 2017  
Request publication:
bibliothek@eas.iis.fraunhofer.de
Language
English
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Keyword(s)
  • IntelligentIP

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