Fault diagnosis of analog integrated circuits using an analog fault simulator

A methodology for locating faults in analog integrated circuits using an analog fault simulator is proposed. It directly makes use of the test stimulus and the measured output response of the defective circuit. In addition the circuit's netlist and a reasonable fault list are assumed to be available. For each fault of the given fault list the output response resulting from the test stimulus is simulated. These responses are classified according to the similarity degree to the measured output response of the defective circuits. A fault causing an output response with a high similarity degree to the measured output response is likely to represent the underlying defect in the circuit. The effectiveness of the methodology has been proved by successfully locating faults in two industrial test chips.