BRAM implementation of a single-event upset sensor for adaptive single-event effect mitigation in reconfigurable FPGAs

In this paper, we study the performance of a Block RAM (BRAM)-based embedded radiation sensor for adaptive single-event effect mitigation in FPGAs. To achieve this, we designed custom BRAM wrappers to extend the Xilinx BRAM macros with scrubbing and error correction, for both free and used BRAMs (utilized by the user). A case study demonstrates that in a system with all 298 BRAMs (of the Virtex-5QV) in use for sensing, a system failure rate of l = 0.05 acan be expected, for the BRAM sensor itself. The resource overhead of this single-event upset sensor is 4.9 % of the FPGA resources (maximum of lookup tables and flip-flops). We conclude that our single-event upset sensor is robust enough to measure radiation levels reliably in real time. Our work is part of the Fraunhofer On-Board Processor, which is part of a geostationary earth orbit communication satellite.