An approach to a liquid crystal voltage contrast testsystem

This paper deals with a test system for digital integrated circuits based on a liquid crystal voltage contrast can be controlled by a backplate electrode. Based on the backplate electrode several test modes have been developed for failure localization on gate level and timing analysis of the logical states. In order to achieve a suitable operating point the backplate electrode is controlled by a particular algorithm for each test mode. The algorithms provide both the accomodation of the voltage applied to the liquid crystal layer as to the characteristics of the transfer curves and an optimization of the liquid crystal voltage contrast. the operation of the algorithms and a discussion of several examples are presented. The examples point out, that the algorithms lead to a liquid crystal voltage contrast the spatial and temporal resolution of which is sufficient for a test.