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  4. Mitigating the Effects of RRAM Process Variation on the Accuracy of Artificial Neural Networks
 
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2022
Conference Paper
Title

Mitigating the Effects of RRAM Process Variation on the Accuracy of Artificial Neural Networks

Abstract
Weight storage is a key challenge in the efficient implementation of artificial neural networks. Novel memory technologies such as RRAM are able to greatly improve density and introduce non-volatility and multibit capabilities to this component of ANN accelerators. The usage of RRAM in this domain comes with downsides, mainly caused by cycle-to-cycle and device-to-device variability leading to erroneous readouts, greatly affecting digital systems. ANNs have the ability to compensate for this by their inherent redundancy and usually exhibit a gradual deterioration in the accuracy of the task at hand. This means, that slight error rates can be acceptable for weight storage in an ANN accelerator. In this work we link device-to-device variability to the accuracy of an ANN for such an accelerator. From this study, we can estimate how strongly a certain net is affected by a certain device parameter variability. This methodology is then used to present three mitigation strategies and to evaluate how they affect the reaction of the network to variability: a) Dropout Layers b) Fault-Aware Training c) Redundancy. These mitigations are then evaluated by their ability to improve accuracy and to lower hardware overhead by providing data for a real-word example. We improved this network’s resilience in such a way that it could tolerate double the variation in one of the device parameters (standard deviation of the oxide thickness can be 0.4 nm instead of 0.2 nm while maintaining sufficient accuracy.)
Author(s)
Fritscher, M.
Friedrich-Alexander-Universität Erlangen-Nürnberg
Knödtel, J.
Friedrich-Alexander-Universität Erlangen-Nürnberg
Mallah, Maen
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Pechmann, S.
Universität Bayreuth
Perez-Bosch Quesada, E.
IHP-Leibniz-Institut fur innovative Mikroelektronik
Rizzi, T.
IHP-Leibniz-Institut fur innovative Mikroelektronik
Wenger, C.
IHP-Leibniz-Institut fur innovative Mikroelektronik
Reichenbach, M.
Friedrich-Alexander-Universität Erlangen-Nürnberg
Mainwork
Embedded Computer Systems: Architectures, Modeling, and Simulation  
Conference
International Conference on Embedded Computer Systems - Architectures, Modeling, and Simulation 2021  
DOI
10.1007/978-3-031-04580-6_27
Language
English
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Keyword(s)
  • Device variation

  • Memristors

  • Neural networks

  • RRAM

  • Simulation

  • Mixed analog digital integrated circuits

  • Neural networks

  • RRAM

  • Simulation

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