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  4. UV nanoimprint lithography process optimization for electron device manufacturing on nanosized scale
 
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2008
Poster
Title

UV nanoimprint lithography process optimization for electron device manufacturing on nanosized scale

Title Supplement
Poster at MNE 2008, 34th International Conference on Micro and Nano Engineering, Athens, Greece
Other Title
Prozessoptimierung für die UV Nanoimprint Lithografie zur Herstellung nanoskaliger elektronischer Bauelemente
Author(s)
Schmitt, H.
Amon, B.
Petersen, S.
Rommel, Mathias  orcid-logo
Bauer, A.J.
Ryssel, H.
Conference
International Conference on Micro- and Nano-Engineering (MNE) 2008  
File(s)
Download (2.75 MB)
Rights
Use according to copyright law
DOI
10.24406/publica-fhg-359320
Language
English
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Keyword(s)
  • UV nanoimprint lithography

  • residual layer

  • electron device

  • UV curing material

  • MOSFET

  • transistor

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