Process technology for 3D-CMOS devices

An advanced 2 mym 3D-CMOS process was developed which allows the fabrication of NMOS devices in the substrate and CMOS devices in a thin laser recrystallized polysilicon layer. The processing parameters were determined carefully in order to obtain a high-quality SOI layer and to avoid any degradation of underlying substrate devices. The fabricated devices in both layers show customary bulk device quality.