A High-speed Low-power Sense Amplifier for the RRAM Array with Multi-level Reading Function using 130-nm Technology

Resistive random-access memory (RRAM) devices have been drawing increasing attention due to their robust performances. Sense amplifiers are widely utilized in the RRAM crossbar reading for their small size and low power consumption. This paper presents a design of a sense amplifier which charges the bit line using its pre-charge phase and reaches a 5ns reading speed, ensuring a Monte-Carlo yield of 98.2 % for a 16 bit word line (WL) length and avoiding the read failure from bit line parasitics Additionally, 33.87 fJ (power dissipation 6.77 μW) per bit and 45.68fJ (power dissipation 9.14 μW) per bit energy are consumed for one reading operation of HRS (High Resistance State) and LRS (Low Resistance state), respectively. The possibility of multi-level sensing is discussed as well.