Verfahren zur Herstellung einer dreidimensionalen integrierten Schaltung unter Erreichung hoher Systemausbeuten

The invention relates to a process for the production of a three-dimnensional integrated circuit while obtaining high system yields. When joining substrates which contain a large number of identical components, so-called chips, the resulting yield of a multi-layer system is obtained from the product of the individual yields. This leads to the fact that the yield of a system comprising several component layers is drastically reduced using known processes. In the process according to the invention, an additional substrate is used to build up a system comprising several component layers, said system containing no component structures. A finished substrate is first subjected to a functional test, whereby the intact chips of the substrate are selected. Then this substrate is joined to an auxiliary substrate which is thinned from the rear and separated into individual chips. Following this, the selected, intact chips are applied to the substrate. After removing the auxiliary substrate, other component layers can be applied in the same way. Using the process according to the process, the yield is drastically increased through the production of three-dimensional integrated circuits, and production costs are lowered