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PublicationExperimental and simulative study of warpage behavior for fan-out wafer-level packaging( 2022)Controlling warpage effects in fan-outwafer-level packaging (FO-WLP) is of key importance for realizing reliable and cost-efficient system in packages (SiPs). However, warpage effects can occur during the manufacturing process, caused by a combination of different processing temperatures, different materials, and the changing properties of the materials (e.g. polymerization and related cure shrinkage). One approach to controlling warpage could be realized by assessing a numerical simulation workflow of the FO-WLP process chain, in which the relevant material properties and geometry are used as input. Since there are many different steps included in the FO-WLP process, accompanied by complex material behavior, this workflow is not straight-forward. In the present paper, the first FO-WLP processing steps are investigated in detail by performing extensive thermo-mechanical material characterization, temperature-dependent warpage measurements, and numerical simulations. The investigation focuses on two epoxy mold compound (EMC) materials with completely different physical properties. The warpage measurements of bi-material (EMC and silicon) samples reveal an irreversible effect after passing certain processing temperatures, which are significant for final warpage at room temperature. A new approach to measuring the coefficient of thermal expansion (CTE) is discussed, using a temperature profile based on the temperature in the process, instead of the three identical temperature ramps suggested by the typical standards. This new approach makes it possible to determine possible shrinkage effects. Within the simulation model, the hysteresis effect observed in the experiment is taken into account by adding a shrinkage strain as well as changing the CTE values during the process. A very good agreement between the experiment and simulation is achieved, which is shown for several demonstrators with different epoxy mold compound materials and thicknesses.
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PublicationLow-Temperature Processible Highly Conducting Pastes for Printed Electronics Applications( 2022)Scalable additive manufacturing of printed electronics is a growing field accompanied by increasing demands for reliable and integrable functional flexible printed electronic devices. Herein, a novel type of electrically conducting silver-based pastes for additive manufacturing is demonstrated. These pastes are designed for stencil- and screen-printing and can be post-processed at very low temperatures, at ambient. Furthermore, printed lines made with the pastes exhibit an electrical sheet resistance below 60 mΩ sq-1 even after room temperature and only 25 mΩ sq-1 after two minutes of curing at 90 °C.
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PublicationInterconnecting embroidered hybrid conductive yarns by ultrasonic plastic welding for e-textiles( 2022)
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PublicationInvestigation and Modeling of Etching Through Silicon Carbide Vias (TSiCV) for SiC Interposer and Deep SiC Etching for Harsh Environment MEMS by DoE( 2022)This article presents prime results on process development and optimization of dry etching of silicon carbide (SiC) for via formation and deep etching for SiC-based microsystems. The investigations and corresponding results of the process developments enable the first realization of a full SiC-based technological demonstrator composed of a SiC-interposer with a flip chip mounted deep etched micro electromechanical system (MEMS) SiC Device. By optimizing the process, etch depth of 200 μm with an etch rate of up to 2 μm /min can be achieved for via etching. In addition, a design of experiments (DoEs) with a total of 29 experiments with seven factors was done to characterize the deep etching of large areas into the SiC. Hereby, vertical sidewalls with low micromasking, low microtrenching and an etch rate of up to 4 μm /min could be achieved. The findings and optimized processes were implemented to develop on the one hand a 200- μm -thick SiC interposer with copper metallization. On the other hand, a SiC-MEMS Device was manufactured with a deep etched cavity in SiC bulk wafer forming by the end a 50- μm thin membrane. The results demonstrate the ability of etching monocrystalline SiC with a high etch rate, enabling new fundamental topologies/structures and packaging concepts for harsh environments MEMSs and high-power electronics. The developed etching technologies demonstrate and enable various applications for 3-D Integration with wide bandgap substrates taking advantage of the superior electrical and mechanical properties of SiC.
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PublicationWashable, Low-Temperature Cured Joints for Textile-Based Electronics( 2021)Low-temperature die-attaching pastes for wearable electronics are the key components to realize any type of device where components are additively manufactured by pick and place techniques. In this paper, the authors describe a simple method to realize stretchable, bendable, die-attaching pastes based on silver flakes to directly mount resistors and LEDs onto textiles. This paste can be directly applied onto contact pads placed on textiles by means of screen and stencil printing and post-processed at low temperatures to achieve the desired electrical and mechanical properties below 60 °C without sintering. Low curing temperatures lead to lower power consumption, which makes this paste ecological friendly.
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PublicationWashability of e-textiles: Current testing practices and the need for standardization( 2021)Washability is seen as one of the main obstacles that stands in the way of a wider market success of e-textile products. So far, there are no standardized methods for wash testing of e-textiles and no protocols to comparably assess the washability of tested products. Thus, different e-textiles that are deemed equally washable by their developers might present with very different ranges of reliability after repeated washing. This paper presents research into current test practices in the absence of e-textile-specific standards. Different testing methods are compared and evaluated and the need for standardized testing, giving e-textile developers the tools to comparably communicate and evaluate their products' washability, is emphasized.
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PublicationFerrites in Transfer-Molded Power SiPs: Challenges in Packaging( 2020)Transfer-molding process is enjoying growing interest when aiming for novel high-power density system-in-packages (power SiPs), where not only transistors and diodes but also drivers, passives, coils, and transformers are supposed to be integrated in one package. Encapsulating modules in a transfer-molding process induces higher mechanical load onto module components compared with conventional silicone potting. Previous investigations have shown that integration of delicate components as ferrite cores into molded packages is not as trivial as integration of conventional surface-mount devices or power semiconductors; the brittle ferrites tend to fracture during the encapsulation process, resulting in higher ferrite core loss. The current study aims to identify main root causes for ferrite core cracking during manufacturing of molded power SiPs. The test vehicle is a symmetrical printed circuit board-based package with three pairs of E-shaped ferrite cores. The epoxy molding compound deployed here is characterized to enable filling simulations. Because technical datasheets of ferrites typically lack specifications of mechanical properties, ferrite materials are analyzed in more detail. Filling simulations and thermomechanical simulations are performed to gain insight into process-induced stress, which may induce cracks in the ferrites. In addition, different ferrite designs are evaluated regarding core losses and mechanical stability and, thus, their tendency to fracture.
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PublicationDevelopment and characterization of a novel low-cost water-level and water quality monitoring sensor by using enhanced screen printing technology with PEDOT:PSS( 2020)A novel capacitive sensor for measuring the water-level and monitoring the water quality has been developed in this work by using an enhanced screen printing technology. A commonly used environment-friendly conductive polymer poly(3,4-ethylenedioxythiophene):poly (styrenesulfonate) (PEDOT:PSS) for conductive sensors has a limited conductivity due to its high sheet resistance. A physical treatment performed during the printing process has reduced the sheet resistance of printed PEDOT:PSS on polyethylenterephthalat (PET) substrate from 264.39 W/sq to 23.44 W/sq. The adhesion bonding force between printed PEDOT:PSS and the substrate PET is increased by using chemical treatment and tested using a newly designed adhesive peeling force test. Using the economical conductive ink PEDOT:PSS with this new physical treatment, our capacitive sensors are cost-efficient and have a sensitivity of up to 1.25 pF/mm.
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PublicationFlexible, stretchable, conformal electronics, and smart textiles: Environmental life cycle considerations for emerging applications( 2020)The development of flexible, stretchable, conformal electronics, and smart textiles for wearables and other applications by now lacks a guidance toward environmentally benign product concepts. This article facilitates understanding of environmental implications of material choices and design decisions to help material scientists and product developers alike to consider sustainability implications of their research, innovation, and development. The more such electronics enter the market, the more these composite products will emerge as an ecological problem, unless appropriate measures are taken at the early research stage.
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PublicationOn the feasibility of fan-out wafer-level packaging of capacitive micromachined ultrasound transducers (CMUT) by using inkjet-printed redistribution layers( 2020)Fan-out wafer-level packaging (FOWLP) is an interesting platform for Microelectromechanical systems (MEMS) sensor packaging. Employing FOWLP for MEMS sensor packaging has some unique challenges, while some originate merely from the fabrication of redistribution layers (RDL). For instance, it is crucial to protect the delicate structures and fragile membranes during RDL formation. Thus, additive manufacturing (AM) for RDL formation seems to be an auspicious approach, as those challenges are conquered by principle. In this study, by exploiting the benefits of AM, RDLs for fan-out packaging of capacitive micromachined ultrasound transducers (CMUT) were realized via drop-on-demand inkjet printing technology. The long-term reliability of the printed tracks was assessed via temperature cycling tests. The effects of multilayering and implementation of an insulating ramp on the reliability of the conductive tracks were identified. Packaging-induced stresses on CMUT dies were further investigated via laser-Doppler vibrometry (LDV) measurements and the corresponding resonance frequency shift. Conclusively, the bottlenecks of the inkjet-printed RDLs for FOWLP were discussed in detail.
