Now showing 1 - 10 of 4545
  • Publication
    Dezentrale Methode zur adaptiven Funkparameteroptimierung eines LoRa Funkmoduls
    ( 2024-03-05)
    Gissing, Julius
    Die Optimierung der Energieeffizienz von drahtlosen Sensorsystemen und Netzwerken zur Sicherstellung von Laufzeit und Funktionalität in dynamischen Umgebungen ist eine fundamentale Herausforderung im Entwurf und der Realisierung. Diese Herausforderung kann mittels dezentraler Systemarchitektur effektiv angegangen werden. So wird es den einzelnen Knoten ermöglicht, ihr Verhalten auf Basis lokal verfügbarer Daten dynamisch zur Laufzeit zu adaptieren. Aufgrund der Ressourcenbeschränkung verteilter Sensorsysteme nimmt dabei die Effizienz der genutzten Algorithmen, bezüglich Speicherplatz und Rechenleistung, einen hohen Stellenwert ein. Im Gegensatz zur Nutzung leistungsstarker Server für das Ausführen von Algorithmen stellt dies einen Paradigmenwechsel dar. In dieser Arbeit wird ein Verfahren, das den Ansatz dezentraler Systemstruktur verfolgt, präsentiert und hinsichtlich seiner Leistungsfähigkeit auf realer Hardware experimentell bewertet. Zu diesem Zweck wurde eine adaptive Methode, die die Funkparameterkonfiguration eines LoRa Funkmoduls optimiert, entwickelt und mit dem Stand der Technik zur Parameteranpassung in LoRaWAN verglichen. Dabei wird die Übertragungssicherheit eines Funkkanals in einer schrittweisen Näherung geschätzt, um eine robuste und energieeffiziente Funkkonfiguration zu identifizieren. Experimentelle Ergebnisse zeigen, dass das Verfahren in Bezug auf den langfristigen Energiebedarf besser abschneidet als der Standardansatz im LoRaWAN und so eine deutliche Steigerung der Lebensdauer eines drahtlosen Sensorknotens bewirkt.
  • Patent
    Lokalisierungsvorrichtung zur Lokalisierung eines elektrischen Endgerätes
    ( 2024-02-29) ;
    Berke, Ralph
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    Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Die Offenbarung betrifft eine Lokalisierungsvorrichtung (100) zur Lokalisierung eines elektrischen Endgerätes umfassend: ein Stromnetz-Verbindungsanschluss (102), der ausgebildet ist, von einem Stromnetz eine elektrische Versorgungsleistung zu empfangen; ein Endgeräte-Verbindungsanschluss (104), der mit dem Stromnetz-Verbindungsanschluss (102) elektrisch verbunden ist und ausgebildet ist, die elektrische Versorgungsleistung dem Endgerät zur Verfügung zu stellen; eine Kennungserfassungseinheit (108), die ausgebildet ist, mittels einer Kennungsdetektoreinheit (108.2) eine Kennung (109) zu erfassen; und eine Kommunikationseinheit (106), die die Kennung (109) empfängt und ausgebildet ist, ein Kennungsübertragungssignal (107) abhängig von der Kennung zu erzeugen und zur Weitergabe an ein externes Gerät bereitzustellen.
  • Publication
    Effect of the loop forming process on the lifetime of aluminum heavy wire bonds under accelerated mechanical testing
    ( 2024-02-21)
    Felke, Florens
    ;
    Groth, Anne
    ;
    ;
    Czerny, Bernhard
    ;
    Khatibi, Golta
    ;
    Döhler, Torsten
    ;
    Geissler, Ute
    Heavy wire bonding is one of the most common interconnection technologies in manufacturing of high-power electronics. For industrial applications, the long-term reliability of these connections is crucial. Besides the selection of the wire material and the loop geometry itself, the loop forming process parameters also have an influence on the reliability of the wire bond. In this work, the influence of the backward bond head movement during wire bonding process on the quality of wire bond connections was systematically investigated and qualified by cyclic mechanical lifetime tests, surface roughness measurements of the heel area by laser confocal microscopy and static pull tests. The wire bond loops were fabricated with 300 μm aluminum H11 and H14CR wires with different hardness values. The lifetime at low frequency cycle and high frequency cycle regime was determined by means of two different mechanical cyclic test methods operating at 5 Hz and at 60 kHz respectively. The results have shown, that the surface topology of the heel region caused by the initial plastic deformation during the loop forming process has a significant effect on the wire bond failure due to heel cracking. The number of loading cycles to failure shows an inverse correlation with the degree of surface roughness in a so called wrinkling analysis in the low and high frequency cycle regime. The soft wire exhibits different lifetimes compared to the hard ones depending on the testing conditions, while a significant decrease of the lifetime is observed with >30 % reverse movement during bonding in all cases.
  • Publication
    Numerical simulation approach for consideration of ageing effects in PCB substrates by modifying viscoelastic materials properties
    During operating time of electronic systems, the used materials in such devices are potentially subjected to ageing effects, which might limit the lifetime. Therefore, knowledge about the used materials and the way the materials are affected by ageing effects is of key importance to develop reliable products. In this study, a simulation approach is discussed that is able to consider ageing effects caused by oxidation at elevated temperature of a printed circuit board material, typically used for high frequency applications. The material was characterized for its thermomechanical properties with state-of-the-art techniques for different ageing durations. Ageing was accelerated by storing the samples in an oven at 175 °C for up to 1000 h. Within the simulation workflow, the thermomechanical properties of the different aged states are defined by modifying the pristine viscoelastic properties. Four exponential functions are derived modifying the initial modulus, the characteristic time constants, the shift function and the coefficient of thermal expansion, all in dependency of ageing time. To demonstrate the approach, the soldered interconnection lifetime of a theoretical chip-size-package on a printed circuit board is studied. State-of-the-art lifetime predictions of such interconnections only include thermomechanical ageing effects, for example by creep effects of the solder. By additionally considering the ageing of the printed circuit board, thermal ageing is combined with thermomechanical ageing. Results in the soldered interconnection are compared between either considering additional ageing effects of the printed circuit board or neglecting this behavior. Thus it is shown that thermal ageing plays a significant role in the development of accumulated creep strain which becomes increasingly important with increasing expected lifetime.
  • Publication
    Variable capacity polymer based energy harvesters with integrated macroporous elastomer springs
    ( 2024)
    Jiang, Qixiang
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    Otáhalová, Veronika
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    Burré, Victor
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    Leese, Hannah Siobhan
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    Shaffer, Milo S.P.
    ;
    ;
    Menner, Angelika
    ;
    Bismarck, Alexander
    We introduce a manufacturing concept of variable capacity energy harvesters consisting of macroporous springs integrated within a conducting silicone rubber and dielectric. Printing and polymerising emulsion templates resulted in macroporous spring elements, which were coated with conducting silicone rubber to maintain the active contact surface. By increasing size and number of these springs, the capacitance change of the energy harvesters during compression and recovery increased from 0.4 nF/cm2 to 0.8 nF/cm2. During cyclic loading with 30 N at 2 Hz, the energy harvesters with macroporous springs delivered a power density of 0.58 µW/cm2 at a bias voltage of 50 V, which was 25 times higher than the control without springs. The energy harvesters provided a constant power output over three hours of cyclic loading (21,600 cycles), indicating their structural stability and the durability of the macroporous springs.
  • Publication
    Laboratory X-ray Microscopy of 3D Nanostructures in the Hard X-ray Regime Enabled by a Combination of Multilayer X-ray Optics
    ( 2024)
    Lechowski, Bartlomiej
    ;
    Kutukova, Kristina
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    Grenzer, Jörg
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    Panchenko, Juliana
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    Krüger, Peter
    ;
    ;
    Zschech, Ehrenfried
    High-resolution imaging of buried metal interconnect structures in advanced microelectronic products with full-field X-ray microscopy is demonstrated in the hard X-ray regime, i.e., at photon energies > 10 keV. The combination of two multilayer optics—a side-by-side Montel (or nested Kirkpatrick–Baez) condenser optic and a high aspect-ratio multilayer Laue lens—results in an asymmetric optical path in the transmission X-ray microscope. This optics arrangement allows the imaging of 3D nanostructures in opaque objects at a photon energy of 24.2 keV (In-Kα X-ray line). Using a Siemens star test pattern with a minimal feature size of 150 nm, it was proven that features < 150 nm can be resolved. In-Kα radiation is generated from a Ga-In alloy target using a laboratory X-ray source that employs the liquid-metal-jet technology. Since the penetration depth of X-rays into the samples is significantly larger compared to 8 keV photons used in state-of-the-art laboratory X-ray microscopes (Cu-Kα radiation), 3D-nanopattered materials and structures can be imaged nondestructively in mm to cm thick samples. This means that destructive de-processing, thinning or cross-sectioning of the samples are not needed for the visualization of interconnect structures in microelectronic products manufactured using advanced packaging technologies. The application of laboratory transmission X-ray microscopy in the hard X-ray regime is demonstrated for Cu/Cu6Sn5/Cu microbump interconnects fabricated using solid–liquid interdiffusion (SLID) bonding.
  • Publication
    Fine-Pitch Copper Nanowire Interconnects for 2.5/3D System Integration
    ( 2024)
    Bickel, Steffen
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    Quednau, Sebastian
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    Birlem, Olav
    ;
    ; ; ;
    Panchenko, Juliana
    Heterogeneous integration is a key driver within the field of advanced electronic packaging. The realization of tomorrow’s highly integrated electronic systems depends on the combination and compatibility of various integration technologies at the same hierarchy level. The adoption of novel bonding technologies for a cost-effective realization of multi-chiplet systems is a key aspect. Cu nanowire (NW) interconnects exhibit distinct advantages in terms of their scalability down to a few micrometers, the resulting joint properties and moderate demands with respect to the surface preparation, and the cleanliness of the bonding environment. No solder or flux is required for the bonding process, but the NW bumps still can compensate low height differences. The bonding process can be carried out near room temperature under ambient conditions. We demonstrate the technological possibility to integrate the Cu-NWs for a bump processing scheme including the Cu seed etching on 300 mm wafer for the first time. This paper focuses on the microstructure evaluation and the shear test of the formed Cu-NW interconnects fabricated under ambient conditions within a few seconds. The microstructure analysis shows the intact bonded interconnects and reveals high-resolution details of Cu-NWs. The shear strength of the formed interconnects varies between 4.6 MPa and 90.5 MPa depending on the bonding and annealing conditions. Overall, the results of this study highlight the potential of Cu-NW interconnects for future 3D heterogeneous system integration.
  • Publication
    Cu nanowire fine-pitch joints for next gen heterogeneous chiplet integration
    ( 2024)
    Bickel, Steffen
    ;
    Quednau, S.
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    Birlem, O.
    ;
    Panchenko, Juliana
    ;
    Heterogeneous integration (HI) is a key driver in the field of advanced electronic packaging and depends on the compatibility of various integration technologies at the same hierarchy level. Enabling the cost-effective realization of multi-chiplet systems with a wide range of interconnect pitches the adoption of novel die level bonding technologies appears inevitable. The use of Cu nanowire (NW) based bumps is a promising approach for closing the gap between Cu/SiO2 hybrid bonding and solder based microbumps. Cu-NW joints can be formed under ambient conditions at temperatures below 250 °C. In this study, we investigated the realization of Cu-NW fine-pitch joints with a diameter of 10 μm using NWs with diameter of 100 nm. Overall, the collected data show comprehensible correlations between the resulting shear strengths and microscopic shear failure mechanisms on one hand and the process parameters on the other. The shear test results of die-to-die (D2D) stacks bonded at a temperature of 220 °C reveal strengths above 70 MPa. The fully compatible back-end-of-line (BEOL) fabrication process on 300 mm wafer level, the short and resource-efficient bonding process in conjunction with the remarkable joint properties highlight the potential of the proposed technology.
  • Publication
    Forced Motion Activated Self-Alignment of Micro-CPV Solar Cells
    In micro-concentrating photovoltaics (micro-CPV), the size of solar cells is reduced (<1x1 mm 2 ) compared to conventional CPV. However, the quantity and requirement for placement accuracy of solar cells is increased. To be economically competitive, a promising possibility for the die assembly is a high throughput and relatively unprecise pick and place process combined with surface tension-driven self-alignment of the liquid solder. In this article, this approach is experimentally investigated, with a focus on the influences of solder volume, receiving pad layouts, and initial displacements of the cells on the self-alignment accuracy. Here, we show that an induced motion due to the initial displacement of the cells or due to solder flow along tracks leads to a more robust and accurate process. We found that less solder and rather smaller pads than cells (here by 92 μm or 10.4% of the cell length) are beneficial for self-alignment accuracy. However, for micro-CPV, conductor tracks connected to the pad are required for electrical interconnection and heat dissipation. Here, all cells are self-aligned and reach an accuracy between -15 and +15 μm, which is mainly due to the cell-to-pad size difference. Optical simulations show that this displacement would lead to an optical loss of 0.1% abs instead of 12.1% abs when displacing the cell by 150 μm. Thus, the self-alignment using the surface tension of the liquid solder leads to sufficient accuracy.
  • Publication
    Assessing thermal resistance as a degradation metric for solder bump arrays in discrete SiC MOSFET packages
    ( 2024)
    Kilian, Borja
    ;
    Gleichauf, Jonas
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    Maniar, Youssef
    ;
    ;
    Schneider-Ramelow, Martin
    The development of innovative power electronics solutions for automotive applications introduces new reliability requirements for electronic assemblies and interconnection technologies. Many of the reliability methods used in power electronics require extensive experimental data, resulting in long product design cycles. This work focuses on developing a simulation-driven approach to assess the solder joint reliability of a discrete silicon carbide MOSFET by monitoring its degradation under power cycling in the thermal and thermo-mechanical domains using the thermal resistance of the stack as a failure metric. Active power cycling tests are performed to determine the loading condition at which end-of-life is reached due to a 20 % increase in thermal resistance. Numerical analysis using finite element simulations is conducted to gain a physical understanding of the failure criterion, allowing to monitor solder degradation based on the thermal resistance and to pinpoint failure at individual interconnects within a solder bump array. The proposed methodology aims to accelerate the quality assurance and product qualification processes of discrete power electronic devices.