Now showing 1 - 4 of 4
  • Publication
    Wafer Level Capping Technology for Vacuum Packaging of Microbolometers
    ( 2023-08-03) ; ; ;
    Meier, Dirk
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    Malik, Nishant
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    Roy, Avisek
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    Nguyen, Hoang-Vu
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    Nguyen, Thanh-Phuc
    This paper presents novel technology developments for vacuum wafer level packaging of microbolometer arrays for thermal infrared sensors targeting applications in automotive, safety, and security/surveillance. The concept is based on fabrication of large cap structures on temporary carrier wafers and their subsequent transfer bonding to device wafers. The objective of the presented work was to develop and test wafer level vacuum packaging for MEMS microbolometer arrays (MBA) fabricated on read out integrated circuit (ROIC) wafers. For that, related MBA layouts integrating diverse Pirani vacuum test structures were fabricated on 200-mm silicon wafers. With intent of hermeticity, all wafer bonding steps were done by AuSn soldering using seal rings, which were deposited by electroplating. The relevant process flows with alternative process options as well as the obtained results of the capping approaches are presented and discussed extensively in this article. For characterization of the sealing results, Pirani test structures were utilized. First, their resistance vs. pressure behavior was determined under controlled reference vacuum. The measured resistance values of identical structures after capping were then compared with the reference data to estimate the residual vacuum inside the cavity of the bonded cap structures.
  • Publication
    Embedded Power GaN Components inside a PCB for space applications
    ( 2022)
    Youssef, Toni
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    Azzopardi, Stéphane
    This paper presents the embedding of prepackaged GaN-components for an application of power propulsion unit (PPU) for satellite applications. First embedding trials of the packages with only minor preconditioning resulted in massive failure of the modules in reflow-tests. These failures have been analyzed and understood thanks to finite elements simulations.
  • Publication
    High Density Thin Film Flex Technology for Advanced Packaging Applications
    The paper provides a latest technology review for fabrication of high-density thin film flex and related application examples. The fabrication approach utilizes the well-established processes from wafer level packaging and redistribution technology. Multi-layer routing structures are built by sequential processing of polyimide and semi-additive metal on a carrier wafer with a dedicated release layer. Depending on the number of copper routing layers with typical thickness of 3-5 μm and the required polymer inter dielectric thickness the final multi-layer stacks can have total thicknesses between 20-60 μm. A laser assisted process allows an easy detach of the thin film flex circuits from the carrier wafer. The technology allows high density routing with lines and spaces of 7/7 μm over up to four layers, custom specific front and back side contacts of Au, Cu, NiAu or solder (only front side) to enable different assembly technologies, embedding option for ultra-thin ICs, option for partial rigidness by utilizing the carrier as permanent stiffener as well as option for arbitrary shaped outlines.Three application examples for the high-density flex technology are shown. The first one is a thin film flex with embedded ICs, which is a technology demonstrator for usage as system core of cardiac monitoring patches. The second example includes rigid flex demonstrators with embedded ICs for implementation of 24/60 GHz radar sensor devices. And as a third application case thin film flex is used as polymeric substrate with front and back side contacts. Those thin substrates can be used as interposers or can be stacked on top of each other to enable a multiplication of routing layers. All details regarding the different technology options as well as application examples will be discussed in this paper.
  • Publication
    Compact Wideband Antenna-in-Package Based on PCB Technology for 39 GHz 5G mmWave Applications
    ( 2022)
    Le, Thi Huyen
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    Schwanitz, Oliver
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    Murugesan, Kavin Senthil
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    In this paper, a compact wideband antenna-in-package (AiP) for 5G mmWave applications in the 39 GHz frequency band is presented. The proposed 1x2 antenna array consists of two identical patch antenna elements, which are designed, simulated and fabricated using a multilayer PCB substrate technology suitable for chip embedding. To improve the antenna bandwidth two U-shaped slots are etched in each patch element. The fabricated 1x2 U-slot patch antenna array exhibits a measured impedance bandwidth of 3 GHz at 39 GHz frequency band, and a measured peak gain of 8.8 dBi.