Now showing 1 - 10 of 57
  • Publication
    Investigation and Modeling of Etching Through Silicon Carbide Vias (TSiCV) for SiC Interposer and Deep SiC Etching for Harsh Environment MEMS by DoE
    ( 2022) ;
    Erbacher, Kolja
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    ; ;
    Töpper, Michael
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    Ngo, H.-D.
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    Schneider-Ramelow, M.
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    Lang, K.-D.
    This article presents prime results on process development and optimization of dry etching of silicon carbide (SiC) for via formation and deep etching for SiC-based microsystems. The investigations and corresponding results of the process developments enable the first realization of a full SiC-based technological demonstrator composed of a SiC-interposer with a flip chip mounted deep etched micro electromechanical system (MEMS) SiC Device. By optimizing the process, etch depth of 200 μm with an etch rate of up to 2 μm /min can be achieved for via etching. In addition, a design of experiments (DoEs) with a total of 29 experiments with seven factors was done to characterize the deep etching of large areas into the SiC. Hereby, vertical sidewalls with low micromasking, low microtrenching and an etch rate of up to 4 μm /min could be achieved. The findings and optimized processes were implemented to develop on the one hand a 200- μm -thick SiC interposer with copper metallization. On the other hand, a SiC-MEMS Device was manufactured with a deep etched cavity in SiC bulk wafer forming by the end a 50- μm thin membrane. The results demonstrate the ability of etching monocrystalline SiC with a high etch rate, enabling new fundamental topologies/structures and packaging concepts for harsh environments MEMSs and high-power electronics. The developed etching technologies demonstrate and enable various applications for 3-D Integration with wide bandgap substrates taking advantage of the superior electrical and mechanical properties of SiC.
  • Publication
    Experimental and simulative study of warpage behavior for fan-out wafer-level packaging
    ( 2022) ; ;
    Stegmaier, Andreas
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    Walter, Hans
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    Schneider-Ramelow, M.
    Controlling warpage effects in fan-outwafer-level packaging (FO-WLP) is of key importance for realizing reliable and cost-efficient system in packages (SiPs). However, warpage effects can occur during the manufacturing process, caused by a combination of different processing temperatures, different materials, and the changing properties of the materials (e.g. polymerization and related cure shrinkage). One approach to controlling warpage could be realized by assessing a numerical simulation workflow of the FO-WLP process chain, in which the relevant material properties and geometry are used as input. Since there are many different steps included in the FO-WLP process, accompanied by complex material behavior, this workflow is not straight-forward. In the present paper, the first FO-WLP processing steps are investigated in detail by performing extensive thermo-mechanical material characterization, temperature-dependent warpage measurements, and numerical simulations. The investigation focuses on two epoxy mold compound (EMC) materials with completely different physical properties. The warpage measurements of bi-material (EMC and silicon) samples reveal an irreversible effect after passing certain processing temperatures, which are significant for final warpage at room temperature. A new approach to measuring the coefficient of thermal expansion (CTE) is discussed, using a temperature profile based on the temperature in the process, instead of the three identical temperature ramps suggested by the typical standards. This new approach makes it possible to determine possible shrinkage effects. Within the simulation model, the hysteresis effect observed in the experiment is taken into account by adding a shrinkage strain as well as changing the CTE values during the process. A very good agreement between the experiment and simulation is achieved, which is shown for several demonstrators with different epoxy mold compound materials and thicknesses.
  • Publication
    Low-Temperature Processible Highly Conducting Pastes for Printed Electronics Applications
    ( 2022)
    Scenev, V.
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    Szalapak, J.
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    Werft, Lukas
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    Hoelck, Ole
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    Jakubowska, M.
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    ; ;
    Schneider-Ramelow, M.
    Scalable additive manufacturing of printed electronics is a growing field accompanied by increasing demands for reliable and integrable functional flexible printed electronic devices. Herein, a novel type of electrically conducting silver-based pastes for additive manufacturing is demonstrated. These pastes are designed for stencil- and screen-printing and can be post-processed at very low temperatures, at ambient. Furthermore, printed lines made with the pastes exhibit an electrical sheet resistance below 60 mΩ sq-1 even after room temperature and only 25 mΩ sq-1 after two minutes of curing at 90 °C.
  • Publication
    Interconnecting embroidered hybrid conductive yarns by ultrasonic plastic welding for e-textiles
    ( 2022) ;
    Kalas, D.
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    Reboun, J.
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    Suchy, S.
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    Soukup, R.
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    Moravcova, D.
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    ;
    Schneider-Ramelow, M.
    This article presents a novel approach for the electrical interconnection of embroidered conductive yarns with each other at defined cross-points using ultrasonic spot welding. The electrically conductive yarns are made of silver-coated copper microwires plied with polyester filament fibers into a hybrid embroidery yarn. In this study we evaluated the influence of different material properties (number of microwires of conductive yarn, fabric substrate, and adhesive film), the embroidery designs of contact pads, and the main parameters of the welding process (energy, force, amplitude, and tools) on the welded interconnection. The results were evaluated by the process yield and the contact resistance of the welded contacts. The electrical contacts were then tested for long-term reliability (elevated temperature and humidity, temperature shock change, bending, washing and drying) and analyzed. In addition, the contacts were examined with scanning electron microscopy (SEM) and micro-computed tomography and in the form of cross-sections with optical and SEM techniques to discuss interconnection and failure mechanisms. The results show that ultrasonic spot welding can enable the production of highly reliable interconnections of textile-integrated conductive yarns with contact resistances of a few milliohms that are resistant to mechanical, environmental, and washing conditions, leading to potential new manufacturing processes of e-textiles.
  • Publication
    Washability of e-textiles: Current testing practices and the need for standardization
    ( 2021)
    Rotzler, S.
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    Krshiwoblozki, M. von
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    Schneider-Ramelow, M.
    Washability is seen as one of the main obstacles that stands in the way of a wider market success of e-textile products. So far, there are no standardized methods for wash testing of e-textiles and no protocols to comparably assess the washability of tested products. Thus, different e-textiles that are deemed equally washable by their developers might present with very different ranges of reliability after repeated washing. This paper presents research into current test practices in the absence of e-textile-specific standards. Different testing methods are compared and evaluated and the need for standardized testing, giving e-textile developers the tools to comparably communicate and evaluate their products' washability, is emphasized.
  • Publication
    Washable, Low-Temperature Cured Joints for Textile-Based Electronics
    ( 2021)
    Szalapak, J.
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    Scenev, V.
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    Janczak, D.
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    Werft, L.
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    Rotzler, S.
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    Jakubowska, M.
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    Krshiwoblozki, M. von
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    Kallmayer, C.
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    Schneider-Ramelow, M.
    Low-temperature die-attaching pastes for wearable electronics are the key components to realize any type of device where components are additively manufactured by pick and place techniques. In this paper, the authors describe a simple method to realize stretchable, bendable, die-attaching pastes based on silver flakes to directly mount resistors and LEDs onto textiles. This paste can be directly applied onto contact pads placed on textiles by means of screen and stencil printing and post-processed at low temperatures to achieve the desired electrical and mechanical properties below 60 °C without sintering. Low curing temperatures lead to lower power consumption, which makes this paste ecological friendly.
  • Publication
    FEM-based combined degradation model of wire bond and die-attach for lifetime estimation of power electronics
    ( 2020)
    Grams, A.
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    Jaeschke, J.
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    Wittler, O.
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    Fabian, B.
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    Thomas, S.
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    Schneider-Ramelow, M.
    A combined damage model has been built by the use of degradation models and finite element simulations as physics-of-failure method to determine degradation rates. This approach has some advantages over the more common Coffin-Manson approach like the ability to explicitly consider interactions of failure modes and a better transferability to new geometries. Experimental data from literature, with the example of wire bond and soldered die-attach degradation of a power module under power cycling conditions, has been used to calibrate the degradation models. Degradation rates, failure modes and numbers of cycles to failure could be predicted with a manageable amount of FE simulations and good accuracy; typical observations from power cycling experiments could be reproduced with the combined damage approach. The proposed methodology could be expanded to other degradation effects, e.g. deterioration of the thermal interface to the heatsink, to determine their interaction with other failure modes and effect on lifetime.
  • Publication
    On the feasibility of fan-out wafer-level packaging of capacitive micromachined ultrasound transducers (CMUT) by using inkjet-printed redistribution layers
    ( 2020)
    Roshanghias, A.
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    Dreissigacker, M.
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    Scherf, C.
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    Bretthauer, C.
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    Rauter, L.
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    Zikulnig, J.
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    Braun, T.
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    Becker, K.-F.
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    Rzepka, S.
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    Schneider-Ramelow, M.
    Fan-out wafer-level packaging (FOWLP) is an interesting platform for Microelectromechanical systems (MEMS) sensor packaging. Employing FOWLP for MEMS sensor packaging has some unique challenges, while some originate merely from the fabrication of redistribution layers (RDL). For instance, it is crucial to protect the delicate structures and fragile membranes during RDL formation. Thus, additive manufacturing (AM) for RDL formation seems to be an auspicious approach, as those challenges are conquered by principle. In this study, by exploiting the benefits of AM, RDLs for fan-out packaging of capacitive micromachined ultrasound transducers (CMUT) were realized via drop-on-demand inkjet printing technology. The long-term reliability of the printed tracks was assessed via temperature cycling tests. The effects of multilayering and implementation of an insulating ramp on the reliability of the conductive tracks were identified. Packaging-induced stresses on CMUT dies were further investigated via laser-Doppler vibrometry (LDV) measurements and the corresponding resonance frequency shift. Conclusively, the bottlenecks of the inkjet-printed RDLs for FOWLP were discussed in detail.
  • Publication
    Preparing WEEE plastics for recycling - How optimal particle sizes in pre-processing can improve the separation efficiency of high quality plastics
    ( 2020)
    Maisel, F.
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    Chancerel, P.
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    Dimitrova, G.
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    Emmerich, J.
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    Nissen, N.F.
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    Schneider-Ramelow, M.
    The production of electrical and electronic equipment is a fast-growing industrial sector, which also results in growing generation of waste electrical and electronic equipment (WEEE). An efficient separation is a prerequisite in order to achieve a high recyclability of WEEE plastics and produce pure types of plastics. The scope of the paper is to investigate the influence of particle size on the recyclability of post-shredding plastic fractions from WEEE pre-processing. For this purpose, different shredding technologies for WEEE, their output particle size, the sorting technologies and their required input particle size were investigated and compared. Sample analysis of plastic flakes provided from pre-processors is performed. The results show that the different sorting technologies require different particle size ranges for efficient separation. Three scenarios were investigated in order to identify optimal output particle sizes for improved plastic recycling. The results suggest that a particle size between 10-20 mm increases the sorting efficiency and thus recyclability of the plastic fractions and minimizes the losses into fines. Further recommendations to pre-processors and recyclers include improving the communication between the end-of-life actors, to standardize the particle size range (10-20 mm) as well as not to dispose the fine fraction but to find recyclers operating appropriate fines sorting technologies.
  • Publication
    Influence of temperature and humidity on power cycling capability of power modules
    ( 2020)
    Wuest, F.
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    Wittler, O.
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    Schneider-Ramelow, M.
    Since power electronics becomes more and more important for harsh environments, its power cycling capability under these conditions needs to be known. The goal of this research is to identify how high temperature and humid environments contribute to the damage of power modules during power cycling. Therefore, IGBT modules are tested with power cycling in cold environment, hot, dry environment and hot, humid environment. Additionally, High Humidity High Temperature Reverse Bias testing is done for comparison of different failure mechanisms. Power modules under warm, humid conditions fail significantly earlier than in warm, dry, or even cold, dry environment. This is mainly attributed to two effects. Firstly to the moisture swelling and thermal expansion of the housing material at higher temperatures and humidity which have an influence on the pressure on the thermal interface and secondly the moisture uptake capability of the thermal interface material.