Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM

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  • Publication
    Acoustic GHz-microscopy and its potential applications in 3D-integration technologies
    ( 2015)
    Brand, S.
    ;
    Appenroth, T.
    ;
    Naumann, F.
    ;
    Steller, W.
    ;
    Wolf, M.J.
    ;
    Czurratis, P.
    ;
    Altmann, F.
    ;
    Petzold, M.
    3D-integration is one of the most challenging approaches addressed by researchers in the field of microelectronics in the recent years. With the intension on integrating different components in three dimensions in one device performance and functionality will increase dramatically by reducing the devices footprint. A major challenge in 3D-integration concepts is the electrical interconnection of the stacked individual components. These interconnecting technologies employ micro bumping, temporary wafer bonding, wafer thinning and through silicon vias (TSVs). The increasing complexity and the miniaturization result in new requirements on testing, diagnostics, failure analysis and metrology techniques, methods and tools. Scanning acoustic microscopy (SAM) is a powerful tool for non-destructively inspecting internal structures and features. It employs elastic waves that can be focused and used for imaging and quantitative analyses. However, at conventionally used frequencies (5 MHz - 250 MHz) imaging resolution compromises the application on devices and technologies required in 3D-integration approaches. The current paper reports on the use of acoustic GHz-microscopy for the inspection, defect localization and its ability for identification of abnormalities in through silicon vias. Investigated were artificial and real defects in the TSV-fillings (voids) and the condition of the TSV-walls (rim-delaminations). Acoustic frequencies used in the current work ranged from 400 MHz up to 1.2 GHz allowing for imaging resolutions in the 1 mm - regime. However, highly focused acoustical lenses as employed here require large numerical apertures which inevitably result in a very complex wave propagation and acoustic field inside a solid sample. To improve the understanding and interpretation acoustic intensity fields have been simulated numerically. Results obtained by acoustic GHz-microscopy have been evaluated complimentarily by FIB-cross-sectioning and SEM imaging which gave a valuable insight into the abilities for acoustic TSV-inspection by GHz-SAM.
  • Publication
    Through silicon via technology - processes and reliability for wafer-level 3D system integration
    ( 2008)
    Ramm, P.
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    Wolf, M.J.
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    Klumpp, A.
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    Wieland, R.
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    Wunderle, B.
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    Michel, B.
    ;
    Reichl, H.
    3D integration is a rapidly growing topic in the semiconductor industry that encompasses different types of technologies. The paper addresses one of the most promising technologies which uses through silicon vias (TSV) for interconnecting stacked devices on wafer-level to perform high density interconnects with a good electrical performance at the smallest form factor for 3D architectures. Fraunhofer IZM developed a post frontend 3D integration process, the so-called ICV-SLID technology based on metal bonding using solid-liquid-interdiffusion (SLID) soldering. The SLID metal system provides the mechanical and the electrical connection, both in one single step. The ICV-SLID fabrication process is well suited for the cost-effective production of both, high-performance applications (e.g. 3D microprocessor) and highly miniaturized multi-functional systems. The latter preferably in combination with wafer-level die stacking, as e.g. Thin Chip Integration (TCI) or SnAg-microbu mp technologies. The fabrication of distributed wireless sensor systems (e. g. e-CUBES®) is a typical example for the need of such mixed approaches.
  • Publication
    Comparison of the mechanical properties of low temperature bonded test samples
    ( 2006)
    Bagdahn, J.
    ;
    Bernasch, M.
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    Fischer, C.
    ;
    Wiemer, M.
    The fabrication of silicon microelectromechanical components (MEMS) involves joining of two or even more wafers. During the last years special focus was given on low temperature waferbonding. In this paper an universal test wafer is proposed that can be applied for bond strength quality monitoring. The investigated wafers in this study were activated, wafer-bonded, annealed at 200°C or 400°C and subsequently tested with respect to dicing yield, tensile strength, fracture toughness, and surface energy. The wafer bonding was performed by seven different partners. It was shown that the bonding quality varied significantly for the different activation technologies even for the same annealing conditions. In general the special treated samples exceed the values of a RCA pre-treated reference sample annealed at 200°C. Some of the activation technologies were able to create bonds that reached the value of RCA pre-treated reference samples, which were annealed at 900°C.
  • Publication
    Investigations of strength properties of ultra-thin silicon
    ( 2005)
    Schönfelder, S.
    ;
    Bagdahn, J.
    ;
    Ebert, M.
    ;
    Petzold, M.
    ;
    Bock, K.
    ;
    Landesberger, C.
    Thin silicon offers a variaty of new possibilities in microelectronical and micromechanical industries, e.g. for 3D-integration (stacked dice) or optoelectronic components (LED). The thin wafers are fabricated by back thinning technologies like grinding, polishing or etching and diced into single chips. The separation technologies can be coupled with back thinning technologies (Dicing-by-Thinning) to increase the reliability and strength of dies. In order to characterize and optimize relevant process steps in therms of quality and fabrication yield, also the mechanical properties have to be investigated with respect to defect formation and strength. In this paper three different dicing technologies were characterized by 3-point bending tests. The first technology is a common sawing process. the second and third technology are "Dicing-by-Thinning" processes, one with sawn grooves and the other with dry-etched trenches. In addition to the experimental investigation, analytical and numerical calculations were performed in order to unterstand the nonlinear relationship of force and displacement and to calculate fracture stresses from fracture forces. The results were statistical evaluated by the Weibull theory. Using this approach allows a more comprehensive unter standing of the influence of the process on strength properties independently of geometric factors, in particular, it forms a base to predict the strength determined from tests for real devices and to quantify the potential of strength increase by using improved technologies, such as Dicing-by-Thinning. It was shown in thies paper, that the nonlinear relationship of force and displacement can be described and explained. Thus the fracture stress as parameter of strength could be calculated for all tested samples. Samples, being separated by "Dicing-by-Thi nning", have much higher strength than simply sawed samles. If trenches are made by dry-etched process the strength can be increased tremendously.
  • Publication
    Investigations on TS bondability of different Au wires down to room temperature
    ( 2005)
    Schneider-Ramelow, M.
    ;
    Petzold, M.
    ;
    Knoll, H.
    ;
    Wohnig, M.
    The presentation shows results of Au wire thermosonic (TS) bonding from 125 °C down to room temperature. One topic was the proof of room temperature bondability of different kinds of Au wires (standard, doped, Pd alloyed) on different Al bond pad metallizations and a PCB substrate with Cu/Ni/Pd/flash-Au metallization. Investigations include mechanical tests of Au loops and ball contacts as well as investigations of the microstructure of the contacts (FIB, SEM, TEM). Au/Al intermetallic phases with thicknesses of a few hundred nanometers were found below the Au ball contacts on Al metallization directly after bonding at room temperature (without curing). The Au wedge contacts were exclusively established with flash Au as finish metallization of the PCB.
  • Publication
    Transfer and handling of thin semiconductor materials by a combination of wafer bonding and controlled crack propagation
    ( 2001)
    Bagdahn, J.
    ;
    Katzer, D.
    ;
    Petzold, M.
    ;
    Wiemer, M.
    ;
    Alexe, M.
    ;
    Dragoi, V.
    ;
    Gösele, U.
    Direct waferbonding is an appropriate technology to join two or more wafers of the same or of different materials. Waferbonding can be used to stiffen thin wafers during fabrication. However, conventional fabrication processes lead to an increase of the bond strength, which inhibits the required de-bonding. The propagation of cracks, which is based on a subcritical crack growth in the bonded interface, was used to cleave the bonded wafers. The subcritical crack growth is limited to the bonded interface, since the adjacent bulk semiconductor materials are inherently resistant to subcritical crack growth. The process allows the separation of Si-Si and Si-GaAs wafers after annealing. Wafer-bonded SOI wafers can also be separated with this technology even if they were annealed at 1100°C. The first examples for wafer stiffening during fabrication and wafer transfer using the developed approach will be presented.
  • Publication
    Investigation of bonding behaviour of different borosilicate glasses
    ( 2000)
    Wiemer, M.
    ;
    Hiller, K.
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    Gessner, T.
    ;
    Kloss, T.
    ;
    Schneider, K.
    ;
    Leipold-Haas, U.
    ;
    Bagdahn, J.
    ;
    Petzold, M.
    New investigations were carried out in order to characterise the anodic bonding behaviour of borosilicate glass Borofloat 33 in comparison with different suppliers of borosilicate glass wafers. Firstly the original surfaces were characterised. This was followed by anodic bonding experiments of the glass wafers with unpatterned and patterned silicon wafers. The compounds with unpatterned substrates were evaluated and compared with respect to the parameters bonding temperature, bonding time and current flow. Furthermore, test patterns (Chevron notches) for evaluation of bond strength were prepared, anodically bonded to the glass wafers and then loaded using the Micro Chevron Test up to the failure of the bond.