Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM

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  • Publication
    Panel Level Packaging for Power Applications
    ( 2017)
    Aschenbrenner, Rolf
    Traditional manufacturing of packages like BGAs, QFNs or QFPs is performed on lead frame formats. The number of packages on a lead frame is rather limited. The introduction of Wafer-Level Packaging (WLP) allowed a significant reduction of cost, especially for small chips due to the simultaneous processing of thousands of Chip Size Packages (CSPs). However CSPs are limited to the die size, which means that chips with a high number of I/Os cannot be redistributed to a relaxed interconnect pitch. This can only be achieved by a fan-out redistribution. The introduction of Fan-Out Wafer Level Packaging (FO-WLP) allowed the efficient manufacturing of fan-out packages on wafer formats up to 300 mm. Nevertheless Smart Phones, Wearables and similar applications ask for further cost reduction, which means more efficient processes on large production formats, i e. the introduction of Panel Level Packaging (PLP). A highly efficient method to realize PLP is the already established embedding technology. It uses Printed Circuit Board (PCB) materials, processes and equipment. PLP embedding is already performed in volume manufacturing on large PCB formats of 18""x24"" (456x610 mm²). Today's applications are power packages for MOSFETs, power System-in-Packages (SiPs) and DC/DC converter modules. Manufacturing of larger BGA packages with embedded chips will start soon. Besides its high potential for cost reduction the PLP embedding offers high reliability and unique features like 3D integration of sensors with data processing units or the combination of power switches (IGBTs or MOSFETs) together with drivers and capacitors in one package. This presentation will show examples of PLP embedding from volume manufacturing as well as results of recent research activities. In particular current R&D effort to realize power modules for voltages up to 600 V with integrated electrical isolation will be described. A further example is the realization of a highly integrated intelligent camera module with embedded 32 bit signal processor and memory.
  • Publication
    Panel Level Embedding for Power and Sensor Applications
    ( 2017)
    Aschenbrenner, Rolf
    Traditional manufacturing of packages like BGAs, QFNs or QFPs is performed on leadframe formats. The number of packages on a leadframe is rather limited. The introduction of Wafer-Level Packaging (WLP) allowed a significant reduction of cost, especially for small chips due to the simultaneous processing of thousands of Chip Size Packages (CSPs). However CSPs are limited to the die size, which means that chips with a high number of I/Os cannot be redistributed to a relaxed interconnect pitch. This can only be achieved by a fan-out redistribution. The introduction of Fan-Out Wafer Level Packaging (FO-WLP) allowed the efficient manufacturing of fan-out packages on wafer formats up to 300 mm. Nevertheless Smart Phones, Wearables and similar applications ask for further cost reduction, which means more efficient processes on large production formats, i e. the introduction of Panel Level Packaging (PLP). A highly efficient method to realize PLP is the already established embedding technology. It uses Printed Circuit Board (PCB) materials, processes and equipment. PLP embedding is already performed in volume manufacturing on large PCB formats of 18""x24"" (456x610 mm²). Today's applications are power packages for MOSFETs, power System-in-Packages (SiPs) and DC/DC converter modules. Manufacturing of larger BGA packages with embedded chips will start soon. Besides its high potential for cost reduction the PLP embedding offers high reliability and unique features like 3D integration of sensors with data processing units or the combination of power switches (IGBTs or MOSFETs) together with drivers and capacitors in one package. This presentation will show examples of PLP embedding from volume manufacturing as well as results of recent research activities. In particular current R&D effort to realize power modules for voltages up to 600 V with integrated electrical isolation will be described. A further example is the realization of a highly integrated intelligent camera module with embedded 32 bit signal processor and memory.
  • Publication
    Materials and Concepts for Textile Sensor Systems
    ( 2017)
    Aschenbrenner, Rolf
    ;
    Kallmayer, Christine
    In recent years, the integration of electronics in textiles has gained increasing attention. In order to make the step towards industrial manufacturing of wearable electronics as well as smart technical textiles it is necessary to develop modular concepts as well as integration processes suitable for high volume production. By introducing new concepts for electronic packaging and interconnects, a seamless, comfortable and robust integration of electronics in textiles is possible. Besides the large area technical textiles with integrated sensors for structural health monitoring and environmental conditions, smart garments for the monitoring of movement and physiological parameters play the most important role. These systems can cover various aspects: prevention, diagnosis, therapy and rehabilitation. For these applications sensors can be textile based but also miniaturized conventional sensors can be required. Different polymers and metals can be used as yarns, printable pastes or foils to realize a broad range of measurement principles. While the performance of textile and polymer sensors cannot compete with conventional sensors, the mechanical properties of these materials allow completely new applications, e.g. in strain measurements. The mechanical reliability is essential for smart textiles. Especially different degrees of stretchability and drapeability have to be achieved while maintaining the sensor properties. Various diagnostic sensor systems have been developed over the last decade and the feasibility of ECG and EMG is proven, there are not a lot of products on the market yet. Systems which fulfill lower requirements can be used e.g. in prevention. Currently a major trend in prevention can be seen in posture and movement monitoring as the number of patients having problems with their musculoskeletal system grows continuously. This type of application has the advantage to be also applicable in sports where the barriers for market entrance are much lower.
  • Publication
    Panel Level Embedding for Power and Sensor Applications
    ( 2016)
    Aschenbrenner, Rolf
    Traditional manufacturing of packages like BGAs, QFNs or QFPs is performed on leadframe formats. The number of packages on a leadframe is rather limited. The introduction of Wafer-Level Packaging (WLP) allowed a significant reduction of cost, especially for small chips due to the simultaneous processing of thousands of Chip Size Packages (CSPs). However CSPs are limited to the die size, which means that chips with a high number of I/Os can not be redistributed to a relaxed interconnect pitch. This can only be achieved by a fan-out redistribution. The introduction of Fan-Out Wafer Level Packaging (FO-WLP) allowed the efficient manufacturing of fan-out packages on wafer formats up to 300 mm. Nevertheless Smart Phones, Wearables and similar applications ask for further cost reduction, which means more efficient processes on large production formats, i e. the introduction of Panel Level Packaging (PLP). A highly efficient method to realize PLP is the already established embedding technology. It uses Printed Circuit Board (PCB) materials, processes and equipment. PLP embedding is already performed in volume manufacturing on large PCB formats of 18?x24? (456x610 mm²). Today's applications are power packages for MOSFETs, power System-in-Packages (SiPs) and DC/DC converter modules. Manufacturing of larger BGA packages with embedded chips will start soon. Besides its high potential for cost reduction the PLP embedding offers high reliability and unique features like 3D integration of sensors with data processing units or the combination of power switches (IGBTs or MOSFETs) together with drivers and capacitors in one package. This presentation will show examples of PLP embedding from volume manufacturing as well as results of recent research activities. In particular current R&D effort to realize power modules for voltages up to 600 V with integrated electrical isolation will be described. A further example is the realization of a highly integrated intelligent camera module with embedded 32 bit signal processor and memory.
  • Publication
    Integration Technologies for Smart Textiles
    ( 2016)
    Aschenbrenner, Rolf
    There is a growing demand for ""intelligent environments"" or ""ambient assisted living"" where sensors and actuators that surround people or equipment are constantly exchanging information. Such environments require large area carriers for the electronic components - textile carriers are a good solution due to the large area capability at low cost. They allow the integration of electronic systems in the environment as well as in clothing. Integrating electronics into textiles is still an emerging field. In the development of smart textiles there is a strong drive to go for integration of electronic components into textiles in high volume manufacturing. Different types of smart fabrics, interconnection technologies, and applications have already been developed. But the technologies reported so far have not yet proven to be suited for reliable mass production. Novel concepts are required for the use of conductive textiles as sensors or the integration of conventional sensors in fabric. New yarns with well-defined properties as well as special fabrication processes for the textile are will be needed to obtain reproducible results. On different levels integration technologies have already been developed and qualified. For very small components a direct integration of chips into the yarn is possible. Larger and more complex modules require a specific package with contacts that allow the interconnection to the yarn - e.g. crimping, embroidery and adhesive bonding. Another alternative is the integration of stretchable interposers on the fabric. For all these solutions the I/O count is limited - on the one hand due to the limitations of the fabric, on the other hand due to the necessary size of the contacts of the modules. Together the technologies nonetheless build a platform, which allows the realization of a wide range of textile applications.
  • Publication
    Chip embedding - The key for efficient power electronics solutions
    ( 2016)
    Aschenbrenner, Rolf
    In most of these packages the power semiconductors are connected by bond wires, resulting in large resistances and parasitic inductances. Power chip packages have to carry semiconductors with increasing current densities. Conventional wire bonds are limiting their performance. Today's power modules are based on DCB (Direct Copper bonded) ceramic substrates. IGBT switches are mounted onto the ceramic and their top side contacts are connected by thick Al wires. This allows one wiring layer only and makes an integration of driver chips very difficult. Additionally bond wires result in a high stray inductance which limits the switching frequency. Especially the use of ultra-fast switching wide-bandgap semiconductors, like SiC and GaN, is very difficult. The embedding of chips offers a solution for many of the problems in power chip packages and power modules. While chip embedding was an academic exercise a decade ago, it is now an industrial solution. This paper will show today's available power packages and power modules realized in industrial production as well as in European research projects. The presentation try to show what concrete form such systems may take in the industrial reality, what requirements these package types will be subjected to and where the development trends may lead in the future. This presentation addresses the impact of the IC´s, materials, processes and end product requirements on packaging, interconnect technology, and assembly.