Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM

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  • Publication
    Investigations on the reliability of lead-free CSP subjected to harsh environments
    ( 2004)
    Dudek, R.
    ;
    Döring, R.
    ;
    Michel, B.
    A study of the performance of Flip-Chip Chip-Scale Packages (FC-CSPs) with lead-free solder interconnects was undertaken. The parametric studies on the CSPs were performed considering a wide variation of geometric and material parameters. Two geometrical versions on organic interposer with different die sizes were investigated theoretically and experimentally by thermal cycling tests -40 °C to 150 °C. In the FE-analyses, several additional parameters were examined including BT-interposer thickness, standoff, perimeter vs. full array, and solder-mask defined vs. non-solder-mask defined (NSMD) balls. Underfilling of the CSPs was an additional option. In the finite element analyses (FEA) both SnAg and SnAgCu solders were considered. For the latter a newly developed combined primary-secondary creep law was applied in the calculations. Both the inelastic strain (creep strain) and dissipated strain energy density represent suitable indicators to evaluate cyclic damage. It is demonstrated that for a thermal test cycle both measures result in similar critical cycle numbers. The calculations show that the creep strain always concentrates at the interfaces of the balls to the package. Maximum straining typically occurs at the inner ball row. Major effects on ball fatigue life are shown to be standoff height, ball geometry on both sides non solder mask defined (NSMD), and a stiff underfill. It is also shown that the CSP reliability using a soft underfill with high CTE or a similar "avarage soft underfill layer", composed of the soldermask layers and the underfill itself, can be worse than for a non-underfilled CSP. Testing results are compared to theoretical predictions. In many cases they agree reasonably well. Finally, differences between simulation and testing results are discussed.
  • Publication
    Reliability assessment of flip-chip assemblies with lead-free solder joints
    ( 2002)
    Schubert, A.
    ;
    Dudek, R.
    ;
    Walter, H.
    ;
    Jung, E.
    ;
    Gollhardt, A.
    ;
    Michel, B.
    ;
    Reichl, H.
    Due to environmental awareness, and the health hazards involved in using lead in solders, large efforts to develop lead-free soldering have been made in recent years. Sn-Ag alloys are expected to be one of the best candidate lead-free solders. Furthermore, from a reliability viewpoint, there has been interest in improved thermal fatigue resistance of solder interconnects. In this study, two lead-free solder alloys (Sn96.5Ag3.5, Sn95.5Ag3.8Cu0.7) were investigated in comparison to lead-containing solder alloys (Sn63Pb37, Sn59Pb40Ag1). These investigations were focused on mechanical and physical properties (coefficient of thermal expansion, stress-strain curves at different strain-rates) as well as on the microstructural appearance of the solders. The mechanical and thermomechanical behavior of the solders were examined by TMA, DTMA, tensile tests, and creep tests. Constant-load creep tests were performed on the specimens at temperatures from 20 degrees C to 150 degrees C. Steady-state strain rates spanned seven orders of magnitude ranging from 10/sup -11/ s/sup -1/ to 10/sup -4/ s/sup -1/. The second step is a reliability study of flip-chip assemblies on FR-4 (high T/sub g/ material) with three different underfill materials and with Sn63Pb37, Sn96.5Ag3.5, and Sn95.5Ag4.0Cu0.5 bumps, undergoing thermal cycles from - 55 degrees C to 125 degrees C and -55 degrees C to 150 degrees C. The deterioration (characterized by electrical resistance and SEM) are described. Furthermore, it is shown that the material parameters obtained from the tests will increase the precision of finite-element analysis for reliability studies of microelectronic packages with lead- free solder interconnects.
  • Publication
    Thermo-mechanical analysis of microelectronics components and chipcards
    ( 1998)
    Michel, B.
    ;
    Vogel, D.
    This paper presents the results of a series of experiments and combined numerical simulations for advanced electronic packaging structures. With growing miniaturization the "local" material properties and local temperature gradients exert a greater influence on the reliability of microcomponents and microsystems than in any macroscopic component. The authors apply such experimental techniques as acousto-microscopy, laser scanning microscopy, thermography, and the microDAC method to characterize the material behaviour of microelectronic packaging components. The experiments have been combined directly with FE simulations. This finally leads to an improved reliability assessment of the microcomponents (e.g. chip cards, airbag sensor components). Special attention is also given to the experimental analysis of thermal fatigue behaviour of solder bumps in microsolder interconnects of flip chip assemblies and chip size packages. These problems are very important for applications in automotive electronics and telecommunication as well.
  • Publication
    Thermo-mechanical reliability of flip chip structures used in DCA and CSP
    ( 1998)
    Schubert, A.
    ;
    Dudek, R.
    ;
    Vogel, D.
    ;
    Michel, B.
    ;
    Reichl, H.
    The continuing demand towards high-density and low profile integrated circuit packaging has accelerated the development of flip chip structures as used in direct chip attach (DCA) technology and chip size packages (CSP). The advantages in density, cost and electrical performance are obvious. Solder joints, the most widely used flip chip interconnects, have a relatively low structural compliance due to the large thermal expansion mismatch between silicon die and the organic substrate. This causes high thermally induced creep strain on the interconnects during temperature cycling and leads to early failure of the solder connections. The reliability of flip chip structures can be enhanced by applying an epoxy-based underfill between the chip and the substrate, encapsulating the solder joints. However, over ranges of design, process, and material parameters, different failure modes are observed with significant dependence on material properties and geometry. Nonlinear finite element analysis for flip chip structures is carried out to investigate the reliability impact due to a number of selected design and material parameters. Especially two fundamental issues are addressed, namely, the optimization of thermomechanical properties of underfill materials and manufacturing process-induced defects.
  • Publication
    Reliability investigations of flip chip interconnects in FCOB and FCOG applications by FEA
    ( 1998)
    Schubert, A.
    ;
    Dudek, R.
    ;
    Döring, R.
    ;
    Michel, B.
    One major concern over thermally induced mechanical stress is that it causes reliability problems in electronic device packaging and interconnects. IC packaging has accelerated development of flip chip structures as used in flip chip on board (FCOB) or flip chip on glass (FCOG) technology. Much testing is usually required to meet the reliability needs of an assembly or to optimize its design. Finite element analysis (FEA) is used to understand the reasons for failure and the critical parameters which may be varied; however, use of FEA generates difficulties concerning the geometrical description and constitutive modeling of the materials used. Solder joints, the most widely used FCOB interconnects, have relatively low structural compliance due to the large CTE mismatch between die and organic substrate. This causes high thermally induced creep strain on interconnects during temperature cycling and leads to early failure. Flip chip reliability can be enhanced by applying an epoxy-based underfill between chip and substrate. However, over ranges of design, process and material parameters, different failure modes are observed with significant dependence on material properties and geometry. Nonlinear FEA of flip chip structures is carried out to study the reliability impact of selected design and material parameters. Two fundamental issues are addressed: optimized manufacturing process-induced defects and underfill material thermo-mechanical properties. Anisotropic conductive films (ACF) are widely used for FCOG packaging. Nonlinear FEA simulations are conducted to investigate stress development and relaxation in ACF joints.
  • Publication
    Materials mechanics and mechanical reliability of flip chip assemblies on organics substrates
    ( 1997)
    Schubert, A.
    ;
    Dudek, R.
    ;
    Michel, B.
    ;
    Reichl, H.
    ;
    Jiang, H.
    This paper demonstrates a combined approach of numerical analysis and experimental investigations to study the mechanical reliability of flip chip solder joints. The effect of various design parameters like bump geometry, "soft" and "hard" underfill, and used solder mask on the thermal fatigue life of solder joints is discussed. Since special attention has been directed towards Flip Chip on Board (FCOB) assemblies, constitutive properties of polymeric and solder materials are discussed in detail. The solder is modeled using a nonlinear constitutive law with time dependent (creep) and time independent plastic strains. Furthermore, material testing shows that the underfill and solder mask materials might be considered as linear viscoelastic with temperature time shift properties. Thermal mismatch between the materials assembled is often the main reason for thermally induced stresses. Thermal cycling (125 degrees C...-55 degrees C...125 degrees C) is therefore the load generally used in t he 3D non-linear finite element analysis. Calculation results of the solder bump deformation due to temperature changes are accompanied by experimental deformation analysis. The used MicroDAC method is based on algorithms of local object tracking in images obtained from electron scanning microscopy. The measured deformation fields were utilized for proper materials selection and processing, as well as for verification of finite element analysis.
  • Publication
    FE-Simulation for polymeric packaging materials
    ( 1997)
    Dudek, R.
    ;
    Scherzer, M.
    ;
    Schubert, A.
    ;
    Michel, B.
    Finite element (FE) simulations represent a useful tool to evaluate the thermomechanical behaviour of electronic packages. However, the use of the FE-method generates special difficulties, with particular regard to the proper constitutive modelling of materials used in the assembly. One more general problem in the numerical investigations of encapsulated silicon chips is the occurrence of interfaces between the dissimilar materials. Due to the assumption of sharp interface edges and interface crack tips, stress singularities arise which might be accounted for only approximately in the FE-calculation. The paper intends to show solutions of these simulation difficulties, also by means of materials testing. The complex material behaviour is discussed for different filled epoxy materials, with particular regard to the influence of filler content. A new solution method for the interfacial edge problem is briefly introduced. As an example, the pull strength test is used and the asymptotic solution for an interface edge is presented.
  • Publication
    Materials mechanics and mechanical reliability of flip chip assemblies on organics substrates
    ( 1997)
    Schubert, A.
    ;
    Dudek, R.
    ;
    Vogel, D.
    ;
    Michel, B.
    ;
    Reichl, H.
  • Publication
    Thermal reliability assessment in SM- and COB-technology by combined experimental and finite element method
    ( 1994)
    Dudek, R.
    ;
    Michel, B.
    The authors address the issue of thermo-mechanically stressed microelectronic assemblies. An approach combining finite element simulation and advanced in-situ measuring techniques is presented. Examples deal with the application of experimental methods such as micro moiré technique, speckle pattern photography and x-ray stress analysis in connection with numerical simulations. Problems of solder joint reliability are dealt with.
  • Publication
    Quantitative Deformations- und Rißspitzenanalyse mittels Mikro-Moire-Technik im REM
    ( 1994)
    Michel, B.
    ;
    Kühnert, R.
    A hybrid experimental and numerical approach for the determination of microdeformations and fracture quantities is presented on the example of aluminum CT-specimens. The micro moiré technique is used in a scanning electron microscope combined with 3d finite element analysis of the specimen. Fracture and crack tip quantities have been obtained.