Brockherde, W.W.BrockherdeKlinke, R.R.KlinkeMeyer zu Bexten, V.V.Meyer zu BextenMoraga, C.C.Moraga2022-03-082022-03-081992https://publica.fraunhofer.de/handle/publica/319506A new tool that synthesizes analog IC layout from a netlist-level description is presented. User defined rules derive partitioning and other control information, based on parameters and topology of the circuit. Specialized fast placement and routing tools and a flexible module generator environment can cope with the individual requirements of most analog applications.enALSYNanaloge integrierte Schaltunglayoutlayout synthesislinear integrated circuitsplacementPlazierungRegelungssystemregulation system621conference paper