Under CopyrightPrautsch, BenjaminBenjaminPrautschRao, SunilSunilRaoEichler, UweUweEichlerReich, TorstenTorstenReich2023-05-152023-05-152016https://publica.fraunhofer.de/handle/publica/39212010.24406/publica-fhg-392120Analog integrated circuit design is still characterized by a variety of manual tasks while the digital design procedure benefits from complete and automatic synthesis flows. Therefore, analog parts of mixed-signal circuits easily cause design failures and require the main effort regarding development time and cost. With our rethought generator approach we implemented a large part of a 12-bit DAC (digital-to-analog converter) as reconfigurable analog circuit generator (analog soft IP) for 28 nm FD-SOI. As the result, we reduce analog design time and improve analog circuit design quality. In addition, we improved yield by utilizing the FD-SOI back gate. Ultimately, in contrast to manual analog design, with our approach we gain analog design reuse.enIntelligentIP621004presentation