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  4. Low-Power 4 GHz Frequency Synthesizer for WAIC Systems in 22nm fully-depleted SOI
 
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2025
Conference Paper
Title

Low-Power 4 GHz Frequency Synthesizer for WAIC Systems in 22nm fully-depleted SOI

Abstract
A 4 GHz frequency synthesizer based on a fractional-N phase-locked loop (PLL) with a MASH 1-1-1 SDM is presented. The design was implemented in GlobalFoundries' 22nm FDX (22FDX) process, which is well suited to integrated RF designs in this frequency range, using an active area of ca. 0.25 mm<sup>2</sup>. This frequency synthesizer is intended as a building block for a demonstrator of a wireless intra-aircraft communication (WAIC) system. This paper covers the design architecture as well as simulation and measurement results of the high-performance on-chip signal generator system.
Author(s)
Böhme, Enno
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Tas, Busra
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Kumar, Piyush
University of the Bundeswehr Munich
Huppmann, Marc
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Stajic, Dario
University of the Bundeswehr Munich
Borggreve, David  
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Maurer, Linus N.
University of the Bundeswehr Munich
Mainwork
2025 16th German Microwave Conference Gemic 2025
Funder
Horizon 2020 Framework Programme
Conference
16th German Microwave Conference, GeMiC 2025
DOI
10.23919/GeMiC64734.2025.10979186
Language
English
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Keyword(s)
  • 22nm FDSOI

  • 3rd order MASH sigma-delta modulator

  • Back-gate bias

  • CMOS

  • Fractional-N PLL

  • Phase Noise

  • Prescaler

  • WAIC

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