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  4. Special Session - Hardware-Software Co-Design for Machine Learning Systems Made Open-Source
 
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2025
Conference Paper
Title

Special Session - Hardware-Software Co-Design for Machine Learning Systems Made Open-Source

Abstract
Chip technologies are crucial for the digital transformation of industry and society. Machine Learning (ML) and Artificial Intelligence (AI) are increasingly shaping both daily life and industrial applications, with AI hardware playing a vital role in enabling efficient and scalable ML deployment. However, significant challenges remain in bridging the gap between ML algorithm development and hardware implementation, particularly for edge ML applications where efficiency, power constraints, and adaptability are critical. In such resource-constrained environments, hardware-software co-design becomes essential to achieve the necessary trade-offs between performance, energy efficiency, and system responsiveness. One of the key bottlenecks in ML hardware development is the lack of seamless integration between ML toolchains and electronic design automation (EDA) tools for hardware synthesis and mapping. Current solutions often require extensive manual optimization and costly proprietary software, limiting accessibility and innovation. Open-source tools can play a transformative role in democratizing ML hardware design, fostering collaboration, and addressing the growing shortage of skilled professionals. This paper covers key aspects of hardware-software co-design for ML systems, such as ML algorithms, hardware design, compiler technologies and system security, with a focus on open-source solutions. We highlight the critical need for open-source toolchains that connect ML model development with hardware synthesis and optimization and present solutions for custom hardware, as well as FPGA accelerators.
Author(s)
Tahoori, Mehdi Baradaran
Karlsruher Institut für Technologie
Meyers, Vincent
Karlsruher Institut für Technologie
Roodsari, Mahboobe Sadeghipour
Karlsruher Institut für Technologie
Xu, Huashuangyang
Karlsruher Institut für Technologie
Becker, Jürgen E.
Karlsruher Institut für Technologie
Harbaum, Tanja
Karlsruher Institut für Technologie
Frombach, Felix
Karlsruher Institut für Technologie
Hoefer, Julian
Karlsruher Institut für Technologie
Sotiropoulos, Georgios
Karlsruher Institut für Technologie
Henkel, Jörg
Karlsruher Institut für Technologie
Demirdag, Zeynep G.
Karlsruher Institut für Technologie
Khdr, Heba
Karlsruher Institut für Technologie
Nassar, Hassan
Karlsruher Institut für Technologie
Schlichtmann, Ulf
Technische Universität München
Geier, Johannes
Technische Universität München
Kempen, Philipp van
Technische Universität München
Sigl, Georg  
Fraunhofer-Institut für Angewandte und Integrierte Sicherheit AISEC  
Koegler, Stefan
Technische Universität München
Probst, Matthias
Technische Universität München
Teich, Jürgen
Friedrich-Alexander-Universität Erlangen-Nürnberg
Hannig, Frank
Friedrich-Alexander-Universität Erlangen-Nürnberg
Sabih, Muhammad
Friedrich-Alexander-Universität Erlangen-Nürnberg
Sesli, Batuhan
Friedrich-Alexander-Universität Erlangen-Nürnberg
Wehn, Norbert
Rheinland-Pfälzische Technische Universität Kaiserslautern-Landau
Steiner, Lukas
Rheinland-Pfälzische Technische Universität Kaiserslautern-Landau
Kunz, Wolfgang
Rheinland-Pfälzische Technische Universität Kaiserslautern-Landau
Shelkamy Ali, Mohamed
Rheinland-Pfälzische Technische Universität Kaiserslautern-Landau
Mainwork
CODES+ISSS '25: Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis  
Conference
International Conference on Hardware/Software Codesign and System Synthesis 2025  
Open Access
File(s)
Download (887.55 KB)
Rights
CC BY 4.0: Creative Commons Attribution
DOI
10.1145/3742873.3756928
10.24406/H-503786
Additional link
Full text
Language
English
Fraunhofer-Institut für Angewandte und Integrierte Sicherheit AISEC  
Keyword(s)
  • hardware-software co-design

  • machine learning

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