Back bias generator circuit

The present invention relates to a back bias generator circuit having a special DAC for generating an output voltage (OUT) on a digital input to the circuit, an upper and a lower switched capacitor circuit, and a control unit. The DAC is formed of a resistor string and a switching network of several switching transistors. A voltage difference at an uppermost resistor of the resistor string and at a lowermost resistor of the resistor string, respectively, is used in the corresponding switched capacitor circuits to generate an extended upper voltage (VDDH) and an extended lower voltage (VSSL) which may be passed via the switching network to the output of the DAC. The proposed back bias generator circuit is able to generate an output voltage exceeding the upper and lower limits of the supply voltage and allows an area efficient implementation.