Compilation of methodologies to speed up the verification process at system level

This paper describes the ongoing research of significant performance enhancements in the simulation-based verification process at electronic system level. In this challenging field, there is more than one way to improve the verification process. Hence, a compilation is presented which contains seven novel or enhanced approaches respectively. Each of it addresses another subdomain in the field of simulation-based verification. Every individual approach targets to reduce the process time in that subdomain. Utilizing them united, the approaches afford a significant performance benefit. Most of this work has been accomplished in the SANITAS project that is partly funded by the German Federal Ministry of Education and Research (BMBE).