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  4. New dimensions for multiprocessor architectures
 
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2008
Conference Paper
Title

New dimensions for multiprocessor architectures

Title Supplement
On demand heterogeneity, infrastructure and performance through reconfigurability - the RAMPSoC approach
Abstract
Multiprocessor hardware architectures enable to distribute tasks of an application to several microprocessors, in order to exploit parallelism for accelerating the performance of computation. Especially for the application domain of image data processing, where computation performance is a crucial factor to keep the real-time requirements, this approach is a promising solution for the assembly of high sophisticated algorithms e.g. for object tracking. Changing requirements and the necessary implementation of the tasks in terms of modified algorithms, precision and communication needs to be handled by software and hardware adaptation in state of the art architectures. Field Programmable Gate Arrays (FPGAs) enable to exploit the adaptation of hardware cores and the software running on embedded microprocessor cores on an integrated multiprocessor system.
Author(s)
Göhringer, D.
Hübner, M.
Perschke, T.
Becker, J.
Mainwork
International Conference on Field Programmable and Logic Applications 2008. Vol.2  
Conference
International Conference on Field Programmable and Logic Applications (FPL) 2008  
Open Access
File(s)
Download (386.69 KB)
Rights
Use according to copyright law
DOI
10.1109/FPL.2008.4629992
10.24406/publica-r-360301
Additional link
Full text
Language
English
FOM  
Keyword(s)
  • MPSoC

  • reconfigurable hardware

  • image processing

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