Comparison of retrograde and conventional p-wells in regard latch-up susceptibility
Test structures were designed and processed to investigate the effect of retrogade wells on latch-up susceptibility. A 600 keV boron implanation was used to substitute a conventional 80 keV implant followed by a 1100 degree, 105 min drive-in step. The well implantation was done at three different doses (5x10high12cmhighminus2, 1x10high13cmhighminus2 and 5x10high13cmhighminus2).To meet requierements of a given CMOS process with respect to the surface concentration, an additional 140 keV boron implanation was performed for the retrogade well structures. The resulting concentration profiles were measured by SIMS. In order to characterize the structure electrically, the current gain of the parasitic bipolar transistors and the current voltage characteristics of the parasitic thyristor were measured for both well types. The structures with the retrogade well showed a reduction of the current gain by a factor of 3 in the case of the vertical and of 2 in the case of the lateral parasitic bipo lar transistor. The threshold current /th of the parasitic thyristor for a typical structure was 0.2 mA and and 0.6 mA for the conventional and the retrograde well, respectively. The holding current /h was 1.67 mA and 5.15 mA for the structure.