Parametrization of Resistive Crossbar Arrays for Vector Matrix Multiplication
Vector Matrix Multiplication (VMM) is a fundamental operation in machine learning algorithms focused on artificial neural networks and also many simulation codes. Implementations based on crossbar arrays provide a promising approach to perform this operation with an analogue circuit. In comparison to purely digital solutions, significant improvements in processing speed and power consumption can be expected when applying this approach. However, securing the accuracy is more difficult than in the digital case. Primary reasons include nonlinearities of essential resistive elements and non-zero resistances of wiring lines. Many publications have dealt with this topic in the recent years analysing the different influences in different ways. We provide a unified approach based on the well-known indefinite admittance matrix concept for the description of the terminal behaviour of analogue multi-poles for the parametrization of crossbar arrays and for the estimation of computational error limits. This paper describes work in progress. It illustrates the procedures through a number of examples using modelling and simulation capabilities of VHDL-AMS. This behavioural modelling language seems particularly suitable for investigations on tailored implementations using VMM. It combines the support of analogue mixed modelling and simulation with the facility to generate scalable architectures. Aspects of solving this task with Modelica are also discussed. Furthermore, it is also shown how symbolic methods might be used to consider resistances of wiring lines in the parametrization of crossbar arrays.