A Mixed-Signal Interface Circuit for Integration of Embedded 1T1R RRAM Arrays

The system integration of Resistive Random Access Memory (RRAM) as embedded memory is a key issue to enable the usage of this emerging technology. The integration of the individual memory cells in CMOS circuits demands analog operations to realize forming, programming and reading of the individual RRAM cells. The presented circuit bridges this gap between technological research and system design with a circuit capable of these operations while offering a fully-digital interface to allow easy system integration. This enables the usage of RRAM technology as embedded memory without extensive analog knowledge on transistor level.The presented circuit was designed, simulated and layouted using IHP’s MEMRES Module, but can be adapted to other RRAM technologies by changing just a few circuit parameters. Due to its flexibility, it can mitigate the technologies’ intrinsic variability and offers a wide degree of adaptability for different application scenarios. The presented read concept is able to resolve four states with an overall resistance ratio of 3.7. The programming mode enables multi-level set and reset operations with fully-digital control and complete CMOS integration.