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2004
Journal Article
Title
Techniques for achieving low leakage current in dry etched InGaAs waveguide PIN detectors
Abstract
InGaAs waveguide PIN detectors require a low leakage current and adequate passivation. Removing dry-etch-induced subsurface damage and surface residues on mesa sidewalls prior to passivation is not only important in reducing these leakage currents, but it is also critical in preventing device degradation. In this article, we investigate the effects of the mesa sidewall clean treatment on the InGaAs waveguide PINs etched using a methane-based (CH4) reactive ion etch (RIE) and a hydrogen bromide-based (HBr) inductively coupled plasma etch (ICP). Post-dry-etching treatments have been developed employing a rapid thermal anneal, followed by a series of Br-, H2SO4-, and HF-based cleaning processes. Transmission electron microscopy analysis shows no apparent sidewall damage, which could cause high leakage currents. Scanning electron microscopy shows sidewall etch by-product removal and ridge CD maintenance after the wet cleaning processes. Very low leakage currents, comparable to those observed in damage-free wet-etched waveguides, were achieved using the RIE or ICP etches, followed by the combination of post dry-etch treatments. I-V measurements were used to provide a quick feedback of sidewall quality and a sensitive method for evaluating the level of damage in these devices as compared to other analytical techniques.