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  4. 3D-DRAM Si/SiGe superlattices: inspection strategies and evaluation
 
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2025
Conference Paper
Title

3D-DRAM Si/SiGe superlattices: inspection strategies and evaluation

Abstract
The growing interest in using Si/SiGe as a foundational material for 3D stackable DRAM and logic devices presents a significant challenge for inspection strategies, given the defect length scales, density and relative positions.<sup>1, 2</sup> Ensuring the quality of these templates is crucial to minimize current leakage and achieve high electrical efficiency. In this study, we explored various types of Si/SiGe-specific crystalline defects (e.g., misfits, threading dislocations and crosshatch), their z-positions (through stack, surface, at interface) and established correlations using multiple measurement techniques across a wide range of defect-specific interactions with various spectroscopic and microscopic techniques. High-throughput techniques like optical inspection and x-ray topography (XRT) were examined in their effectiveness in identifying misfits based on various physical characteristics. Additionally, high-resolution review techniques such as e-beam and atomic force microscopy (AFM) were tested to assess their ability to detect individual surface misfits and validate inspection results. The balance between throughput, sensitivity, and defect density was also analysed to optimize the detection capabilities of these techniques. Detecting threading dislocations (TDs) as a key objective was investigated using Electron Channelling Contrast Imaging (ECCI). While ECCI is a benchmark reference technique for TD detection, it faces significant throughput challenges. Despite these limitations, the presence of threading dislocations at the ends of misfits on 300mm wafers was identified. In summary, examining Si/SiGe-specific crystalline defects with a blend of high-throughput and high-resolution techniques is essential for optimizing the quality of Si/SiGe superlattices on 3D-DRAM and logic devices. This comprehensive approach can facilitate the development of more efficient inspection strategies, resulting in improved device reliability and electrical efficiency.
Author(s)
Beggiato, Matteo
Interuniversity Microelectronics Centre
Loo, Roger
Interuniversity Microelectronics Centre
Wei, S.
Hitachi High-Technologies Corporation
Moussa, Alain
Interuniversity Microelectronics Centre
Bast, Gerhard
KLA Corporation
Fukaya, Kaoru
Hitachi High-Technologies Corporation
Cerbu, Dorin
Interuniversity Microelectronics Centre
Janardan, Nachiketa
Interuniversity Microelectronics Centre
Chirko, Konstantin
Applied Materials Israel, Ltd.
Han, Han
Interuniversity Microelectronics Centre
Dialameh, Masoud
Interuniversity Microelectronics Centre
Santoro, Gaetano
Applied Materials Belgium
Lorusso, Gian Francesco
Interuniversity Microelectronics Centre
Isawa, Miki
Hitachi High-Technologies Corporation
Wimmer, P.
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Kranert, Christian  
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Reimann, Christian
Rigaku Europe SE
Kuhn, M.
Rigaku Europe SE
Vigliante, A.
Rigaku Europe SE
Meersschaut, Johan
Interuniversity Microelectronics Centre
Belmonte, Attilio
Interuniversity Microelectronics Centre
Cross, Andrew J.
KLA Corporation
Cockburn, Andrew
Applied Materials Belgium
Béral, Christophe
Interuniversity Microelectronics Centre
Charley, Anne Laure
Interuniversity Microelectronics Centre
Kar, Gouri Sankar
Interuniversity Microelectronics Centre
Bogdanowicz, Janusz
Interuniversity Microelectronics Centre
Mainwork
Proceedings of SPIE the International Society for Optical Engineering
Funder
Emerging Pathogens Institute, University of Florida
Conference
Metrology, Inspection, and Process Control XXXIX 2025
Open Access
DOI
10.1117/12.3052524
Additional link
Full text
Language
English
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Keyword(s)
  • 3D-DRAM

  • crystalline defects

  • misfits

  • Si/SiGe

  • threading dislocations

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