Introduction of a novel strategy based on dynamic switching frequencies to reduce current distortion in multi-level grid inverters with active neutral-point-clamping and 4-leg topology

This paper presents a novel strategy to reduce current distortion during voltage zero-crossing in ANPC-inverters (active neutral-point-clamped-inverters). Due to the necessity to insert a small switching blocking-time (dead-time) between the transition of the high and low side switches of the inverter, the effectively useable duty cycle will be limited, resulting in a dead-band near 0% and 100% of the duty cycle. Values inside this dead-band will be clamped to either 0% or 100% respectively, introducing a voltage glitch in the output voltages and consecutively leading to a current distortion. With inverters striving to reach higher switching frequencies and smaller grid filters this effect gains more importance, as even small errors in the output voltages will lead to noticeable distortions in the output currents. The presented strategy utilizes dynamic changes in the switching frequency to reduce the current distortion.