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October 11, 2022
Presentation
Title

Automatic Analog Design and Layout Generation: Chances and Hurdles

Title Supplement
Presentation held at Austrochip Conference 2022, 30th Austrian Workshop on Microelectronics, October 11th, 2022, Villach, Austria
Abstract
To this day, analog circuits elude comprehensive layout synthesis and therefore still have to be designed manually. Due to shrinking to ever more advance nodes as well as due to increasing design complexity, the pressure on analog designers is immense and growing. Despite a variety of improvements in design environments, full analog automation is still in its infancy.
One promising approach – besides synthesis methods - applies procedural methods and specifically generators in the design process. Generators create design data automatically in an often (but not always) PCell-like way. Novel cross-technology concepts allow generators to be technologies-agnostic, too. Thus, they not only systematize the design process and shorten design time, generators also open up the possibility of analog design reuse across design projects. Especially when requirements and/or target technologies change, design efficiency can be significantly increased.
However, generators are not “for free”. They become effective when applied to the right sweet spot. For example, the initial development efforts will pay off when applied on a broader project view that considers, e.g., a product family or when applied to repetitive or human-unfriendly tasks. This requires both some degree of re-thinking the design approach as well as close cooperation between analog designers and EDA developers.
The keynote will first briefly introduce design problems of analog integrated circuits and present current approaches to solve them. This is followed by a closer look at design automation concepts, especially generators that enable the development of cross-technology layout generators. Afterwards, the talk discusses chances and hurdles when applying the generator-based approach in real design projects. An outlook on possible further steps towards a re-use-oriented and highly automated analog design flow concludes the talk.
Author(s)
Prautsch, Benjamin  orcid-logo
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Project(s)
Strukturierter und automatisierter Chip-Entwurf für die Automobilelektronik  
Funder
Bundesministerium für Bildung und Forschung -BMBF-
Conference
Austrian Workshop on Microelectronics 2022  
File(s)
Download (8.47 MB)
Rights
Use according to copyright law
DOI
10.24406/publica-819
Language
English
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Keyword(s)
  • IntelligentIP

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